Samsung Sdi Co., Inc.

Woo-Young So

Kyung-jin Yoo

Sang-Il Park

Sang-II Park

A method of manufacturing a thin film transistor includes: forming an amorphous silicon layer and a blocking layer; forming a photoresist layer having first and second photoresist patterns spaced apart from each other on the blocking layer; etching the blocking layer using the first photoresist pattern as a mask to form first and second blocking patterns; reflowing the photoresist layer so the first and second photoresist patterns abut each other; forming a capping layer and a metal layer; removing the photoresist layer to expose the blocking layer and an offset region between the blocking layer and the metal layer; crystallizing the amorphous silicon layer by diffusing metals in the metal layer through the capping layer; etching the poly silicon layer using the first and second blocking patterns as a mask to form first and second semiconductor layers; and removing the first and second blocking patterns.

Thin film transistor and method of manufacturing the same

A thin film transistor with multiple gates is fabricated using a super grain silicon (SGS) crystallization process. The thin film transistor a semiconductor layer formed in a zigzag shape on an insulating substrate, and a gate electrode intersecting with the semiconductor layer. The semiconductor layer has a high-angle grain boundary in a portion of the semiconductor layer that does not cross the gate electrode.

Thin film transistor with multiple gates fabricated using super grain silicon crystallization

A method of fabricating a thin film transistor with multiple gates uses a super grain silicon (SGS) crystallization process. The thin film transistor includes a semiconductor layer having a zigzag shape formed on an insulating substrate, and a gate electrode that overlaps the semiconductor layer. The semiconductor layer includes a high-angle grain boundary formed during the SGS crystallization process in a portion of the semiconductor layer that is not overlapped by the gate electrode.

Method of fabricating thin film transistor with multiple gates using super grain silicon crystallization

A method of manufacturing a thin film transistor that provides high electric field mobility is disclosed. In one embodiment, the method includes: a) forming an amorphous silicon layer and a blocking layer on an insulating substrate; b) forming a photoresist layer having first and second photoresist patterns on the blocking layer, the first and second photoresist patterns spaced apart from each other; c) etching the blocking layer using the first photoresist pattern as a mask to form first and second blocking patterns; d) reflowing the photoresist layer, so that the first and second photoresist patterns abut on each other to entirely cover the first and second blocking patterns; e) forming a capping layer and a metal layer over an entire first surface of the insulating substrate; f) removing the photoresist layer to expose the blocking layer and an offset region between the blocking layer and the metal layer; g) crystallizing the amorphous silicon layer by diffusing metals in the metal layer through the capping into the amorphous silicon layer; h) etching the poly silicon layer using the first and second blocking patterns as a mask to form first and second semiconductor layers; and i) removing the first and second blocking patterns.

A method of manufacturing a thin film transistor is disclosed. The method includes forming an amorphous silicon layer and a blocking layer on an insulating substrate, forming a photoresist layer having first and second photoresist patterns on the blocking layer, etching the blocking layer using the first photoresist pattern as a mask to form first and second blocking patterns, reflowing the photoresist layer, forming a metal layer over the entire surface of the insulating substrate, removing the photoresist layer to expose the blocking layer and an offset region between the blocking layer and the metal layer, crystallizing the amorphous silicon layer to form a poly silicon layer having a MILC front, etching the polysilicon layer using the first and second blocking patterns as a mask to form first and second semiconductor layers and to remove the MILC front, and removing the first and second blocking patterns.

A thin film transistor with multiple gates using an MILC process which is capable of materializing multiple gates without increasing dimensions and a method thereof. The thin film transistor has a semiconductor layer which is formed on a insulating substrate in a zigzag shape; and a gate electrode which is equipped with one or more slots intersecting with the semiconductor layer, the semiconductor layer includes two or more body parts intersecting with the gate electrode; and one or more connection parts connecting each neighboring body part, wherein a part overlapping the semiconductor layer in the gate electrode acts as a multiple gate, and MILC surfaces are formed at a part which does not intersect with the gate electrode in the semiconductor layer.

Method for fabricating thin film transistor with multiple gates using metal induced lateral crystallization

Thin film transistor with multiple gates using metal induced lateral crystallization and method of fabricating the same

A CMOS thin film transistor having a semiconductor layer formed in a zigzag form on an insulating substrate, and a PMOS transistor region and an NMOS transistor region and a gate electrode having at least one slot crossing the semiconductor layer, wherein the semiconductor layer has an MILC surface existing on the PMOS transistor region and the NMOS transistor region, and the method of manufacturing the same, whereby a manufacturing process of the CMOS TFT is simple and the leakage current is decreased.

CMOS thin film transistor

Method of fabricating a thin film transistor with multiple gates using metal induced lateral crystallization

Thin film transistor with multiple gates using metal induced lateral crystalization and method of fabricating the same

A flat panel display device with improved electrical characteristics and a simplified manufacturing process is disclosed. The device includes a semiconductor layer formed on an insulating substrate; source and drain electrodes directly contacting both end portions of the semiconductor layer, respectively; a pixel electrode having an opening portion formed thereon; a first insulating layer formed over the remaining portion of the insulating substrate except for the opening portion; a gate electrode formed on a portion of the first insulating layer over the semiconductor layer; and source and drain regions formed in both end portions of the semiconductor layer.

Method of manufacturing flat panel display device

A method of manufacturing a thin film transistor that provides high electric field mobility is disclosed. The method comprising: a) forming an amorphous silicon layer and a blocking layer on an insulating substrate; b) forming a photoresist layer having first and second photoresist patterns on the blocking layer, the first and second photoresist patterns spaced apart from each other; c) etching the blocking layer using the first photoresist pattern as a mask to form first and second blocking patterns; d) reflowing the photoresist layer, so that the first and second photoresist patterns abut on each other to entirely cover the first and second blocking patterns; e) forming a metal layer over the entire surface of the insulating substrate; f) removing the photoresist layer to expose the blocking layer and an offset region between the blocking layer and the metal layer; g) crystallizing the amorphous silicon layer to form a poly silicon layer, wherein a portion of the amorphous silicon layer directly contacting the first metal layer is crystallized through a metal induced crystallization (MIC), and the remaining portion of the amorphous silicon layer is crystallized through a metal induced lateral crystallization (MILC), so that a MILC front exists on a portion of the poly silicon layer between the first and second blocking patterns; h) etching the poly silicon layer using the first and second blocking patterns as a mask to form first and second semiconductor layers and to remove the MILC front; and i) removing the first and second blocking patterns.

Growing community of inventors

Suwon, South Korea

Woo-Young So