Samsung Electronics Co., Ltd.

Woo-Sung Han

Chang-jin Sohn

Cheol-hong Kim

Ho-Young Kang

Seong-oon Choi

Sang-jun Choi

Yu-Sik Kim

Gi-Sung Yeo

Jung-hyeon Lee

Doo-Hoon Goo

Seong-Woon Choi

Tae-Moon Jeong

Won-Tai Ki

Shun-Yong Zinn

Jung-Min Sohn

Chang-ki Hong

Hak Soo Kim

Jeong-Nam Han

Woo-Gwan Shim

Seong-woon Choi

Sang-gyun Woo

Sung-Gon Jung

Suk-Joo Lee

Chang-Ki Hong

Sang Jun Choi

Hee-bom Kim

Sung-min Huh

Chang-Sup Mun

Jin-sik Jung

Dong-Seon Lee

Chang-Jin Sohn

Gee-Hoo Kim

A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount includes a base substrate having first and second surfaces, a conductive pattern on the first surface, first and second pairs of first and second electrodes on the second surface and vias extending through the base substrate between the first and second surfaces. The conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes.

Light emitting device including a light emitting element mounted on a sub-mount

A method of forming a line/space pattern includes forming a plurality of first pattern structures on a layer of hard mask material disposed on a substrate, forming a plurality of second pattern structures along sidewalls of the first pattern structures, removing the first pattern structures such that the second pattern structures stand alone on the layer of hard mask material, forming a first mask that exposes a location where a space of the line/space pattern to be formed is to have a width greater than the distance between adjacent ones of the second pattern structures, removing those of the second pattern structures which are exposed by the first mask such that others of the second pattern structures remain on the layer of hard mask material, forming a second mask that covers a location where a line of the line/space pattern to be formed is to have a width that is greater than the widths of the second pattern structures, forming a hard mask by etching the hard mask material layer using the second mask and the remaining second pattern structures as an etch mask, and etching the substrate using the hard mask as an etch mask.

Method of forming line/space patterns

A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount including a base substrate including a first surface and a second surface different from the first surface, a conductive pattern on the first surface, a first pair and a second pair of first and second electrodes on the second surface, and vias extending through the base substrate between the first and second surfaces, wherein the conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes of the first and second pair of first and second electrodes through the vias.

Sub-mount, light emitting device including sub-mount and methods of manufacturing such sub-mount and/or light emitting device

A binary photomask with an improved resolution and a method of manufacturing the same are provided. The binary photomask may include a substrate, a transmission-prevention pattern formed on the substrate to define a circuit pattern, and a compensation layer configured to change light transmitted through the binary photomask based on a topology of the compensation layer and arranged on the transmission-prevention layer and/or the substrate.

Binary photomask having a compensation layer

A mask for use in measuring flare produced by a projection lens of a photolithography system, a method of manufacturing the mask, a method of identifying a flare-affected region on a wafer, and a method for correcting for the flare to produce photoresist patterns of desired line widths are provided. A first photolithographic process is performed to form photoresist patterns on a test wafer using a mask including a light shielding region having a plurality of light transmission patterns and a light transmission region, and the photoresist patterns formed by light passing through the light transmission patterns of the light shielding region are compared to the photoresist patterns formed by light passing through the light transmission region. The amount of flare produced by the projection lens is quantified using the results of the comparison, and thus it is possible to identify a flare-affected region on the wafer. In addition, it is possible to form uniform photoresist patterns on the wafer by determining the open ratio of the flare-affected region and calculating an effective amount of the flare in the flare-affected region from the amount of flare of the lens and the open ratio. More specifically, a mask is produced in which the line widths of mask patterns are configured, i.e., corrected compared to the first mask, taking into consideration the effective amount of the flare.

Mask for use in measuring flare, method of manufacturing the mask, method of identifying flare-affected region on wafer, and method of designing new mask to correct for flare

A semiconductor memory device includes a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

Semiconductor memory device having high electrical performance and mask and photolithography friendliness

A cleaning composition comprises an alkali solution, pure water, and a surfactant represented by the following chemical formula: R1-OSO&#x2014;HAwherein R1 is one selected from a group consisting of a butyl group, an isobutyl group, an isooctyl group, a nonyl phenyl group, an octyl phenyl group, a decyl group, a tridecyl group, a lauryl group, a myristyl group, a cetyl group, a stearyl group, an oleyl group, a licenoleyl group and a behnyl group, and A is one selected from a group consisting of ammonia, ethanol amine, diethanol amine and triethanol amine.

Cleaning composition and method of cleaning a semiconductor device using the same

A semiconductor memory device comprises a plurality of rows, each row comprising a plurality of active regions arranged at a pitch wherein the active regions in adjacent rows are shifted with respect to each other by one half of the pitch, wherein a distance between each active region in a row is equal to a distance between active regions in adjacent rows.

A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.

Method of manufacturing a semiconductor device using a polysilicon etching mask

Polymer having butadiene sulfone repeating unit and resist composition comprising the same

A projection method uses a modified illumination method for a lithography process of semiconductor device, and a projection system and mask use the projection method. An object is exposed by removing the vertical incident component of light passed through a condenser lens. Zero-order diffracted light interferes destructively and the oblique component of .-+.first-order diffracted light, interferes constructively. The obliquely incident component light illuminates a mask having a pattern formed thereon. The vertical incident component of the light is removed by a phase difference of light due to a grating mask or a grating pattern formed on the back surface of the conventional mask. The resolution of a lithography process is improved due to the increased contrast, and the depth of focus is also increased. Thus, patterns for 64 Mb DRAMs can be formed using a conventional projection exposure system.

Projection exposure systems

A projection method uses a modified illumination method for a lithography process of semiconductor device, and a projection system and mask use the projection method. An object is exposed by removing the vertical incident component of light passed through a condenser lens. Zero-order diffracted light interferes destructively and the oblique component of -/+ first-order diffracted light, interferes constructively. The obliquely incident component light illuminates a mask having a pattern formed thereon. The vertical incident component of the light is removed by a phase difference of light due to a grating mask or a grating pattern formed on the back surface of the conventional mask. The resolution of a lithography process is improved due to the increased contrast, and the depth of focus is also increased. Thus, patterns for 64 Mb DRAMs can be formed using a conventional projection exposure system.

Projection method and projection system and mask therefor

An aperture for an off-axis illumination (OAI) and a projection exposure apparatus which employs the same. In the aperture for an OAI having a light-intercepting region and a light-transmitting region, at least a portion of the light-transmitting region is prismoidal and diffracts incident light toward the periphery of the condenser lens. Accordingly, light intensity is increased due to an increased light-transmitting region, which can lead to a reduction in the exposure time required for photolithography procedures and to an increased productivity of semiconductor devices.

Aperture for off-axis illumination and projection exposure apparatus

A photo mask and method for manufacturing the same increase the capacitance of a capacitor by improving the proximity effect of a mask pattern. The photo mask includes a transparent substrate, an opaque mask pattern for defining an optical transmission area on the substrate, and an optical transmittance control film pattern for suppressing proximity effect in the optical transmission area. The proximity effect is suppressed by forming an optical transmittance control film pattern in the transmission area between the individual portions of the opaque mask pattern, so that the mask pattern shape can be exactly transferred onto a substrate.

Growing community of inventors

Seoul, South Korea

Woo-Sung Han