Samsung Electronics Co., Ltd.

Woo-Suk Chung

Hyun-Jae Kim

Chang-Won Hwang

Sook-Young Kang

Sung-Hee Cho

Chi-Woo Kim

Myung-Koo Kang

Hyong-Gon Lee

Bo-Young An

Tae-Hyeong Park

Jeon-Taek Im

Sung-Bong Kang

Joong-Kyu Choi

Gyu-Sun Moon

In a TFT LCD device comprising a substrate, at least one thin film transistor formed on the substrate, having a source electrode and a drain electrode, an insulating layer formed over the whole surface of the substrate on which the thin film transistor is formed, having at least one contact hole exposing a portion of the drain electrode, and reflective layer pixel electrode corresponding to the thin film transistor, formed on the insulating layer to be connected with the drain electrode through the contact hole, the pixel electrode is formed of a multi-layered conductive layer. The drain electrode is composed of multiple layers, and the most upper layer of the multiple layers is one selected from a Cr layer and a MoW layer. Preferably, the multi-layered conductive layer is composed of two-layered conductive layer having a lower layer of the same material as that of the most upper layer and an upper layer of Al-containing metal.

TFT LCD device having multi-layered pixel electrodes

A thin film transistor and a liquid crystal display, in which a gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed. In a liquid crystal display, a plurality of thin film transistors forming a data driver circuit include thin films of polycrystalline silicon formed by sequential lateral solidification, at least one portion of a gate electrode of each thin film transistor extends in a direction crossing the grain growing direction, and at least one of the plurality of thin film transistors has a gate electrode having a pattern different from other thin film transistors.

Thin film transistor having a three-portion gate electrode and liquid crystal display using the same

The present invention provides a system with a plurality of Bluetooth dongles connected to a single host. Each dongle is connected to a different port on the host and each dongle can accommodate a piconet of up to seven Bluetooth devices. The host communicates with the Bluetooth devices via Bluetooth channels. The host includes an application layer, a Host Control Interface (HCI) layer and an interface device driver layer. An Interface Map Table (IMT) is stored in the host. The IMT associates each port on the host with the BD address of a particular Bluetooth dongle and with the channels associated with the particular dongle. The HCI layer and the Interface handler layer consult the IMT to direct commands and data to the correct port on the host.

Enhanced bluetooth communication system

The present invention relates to a thin film transistor and a liquid crystal display. A gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed. In a liquid crystal display according to the present invention, a plurality of thin film transistors forming a data driver circuit include thin films of polycrystalline silicon formed by sequential lateral solidification, at least one portion of a gate electrode of each thin film transistor extends in a direction crossing the grain growing direction, and at least one of the plurality of thin film transistors has a gate electrode having a pattern different from other thin film transistors.

In a liquid crystal display, a plurality of gate lines and data lines are provided on a first substrate including a display area as a screen, and a peripheral area external to the display area wherein a plurality of pixel electrodes are electrically connected to the gate lines and to the data lines, and some of the pixel electrodes extend to be located in the peripheral area; and optionally, a black matrix is formed on a second substrate disposed opposite to the first substrate for screening the extended portions of the pixel electrodes located in the peripheral area, a rubbing direction of aligning films is formed on the first and the second substrates towards the extended portions of the pixel electrodes located in the peripheral area so that impurity ions on the surface of the aligning film travel along the rubbing direction to stop at the extended portions of the pixel electrode, and an image defect area caused by the impurity ions is screened with the black matrix.

Liquid crystal display having additional signal lines to define additional pixel regions

A thin film transistor (TFT) array panel includes: an insulating substrate (); first and second semiconductor members () formed on the substrate and having opposite conductivity; a first gate member () formed on a first layer (), insulated from the first and the second semiconductor members and overlapping one of the first and the second semiconductor members; a second gate member () formed on the first layer (), separated from the first gate member, and insulated from the first and the second semiconductor members (), the second gate member () not overlapping the first and the second semiconductor members; a first data member () formed on a second layer (), connected to one of the first and the second semiconductor members () and insulated from the first () and the second () gate members; and a first connection () formed on the second layer () and connecting the first gate member () and the second gate member ().

Thin film transistor array panel and manufacturing method thereof

In a liquid crystal display, a plurality of gate lines and data lines are provided on a first substrate including a display area as a screen, and a peripheral area external to the display area wherein a plurality of pixel electrodes are electrically connected to the gate lines and to the data lines, and some of the pixel electrodes extend to be located in the peripheral area; and optionally, a black matrix is formed on a second substrate disposed opposite to the first substrate for screening the extended portions of the pixel electrodes located in the peripheral area, a rubbing direction of aligning films is formed on the first and the second substrates towards the extended portions of the pixel electrodes located in the peripheral area so that impurity ions on the surface of the aligning film travel along the rubbing direction to stop at the extended portions of the pixel electrodes, and an image defect area caused by the impurity ions is screened with the black matrix.

Liquid crystal display

Thin film transistor with gate electrode portion crossing grain growing direction and liquid crystal display comprising the same

A polycrystalline silicon TFT for an LCD and a manufacturing method thereof is disclosed. The TFT comprises an active pattern formed on a substrate, a gate insulating layer formed on the substrate including the active pattern, a gate line formed on the gate insulating layer to be crossed with the active pattern and including a gate electrode for defining the first impurity region, a second impurity region and a channel region, an insulating interlayer formed on the gate insulating layer including the gate line, a data line formed on the insulating interlayer and connected to the second impurity region through the first contact hole which is formed through the gate insulating layer and the insulating interlayer on the second impurity region and a pixel electrode formed on the same insulating interlayer as the data line and connected with the first impurity region through a second contact hole which is formed through the gate insulating layer and the insulating interlayer on the first impurity region. The number of mask can be reduced to 5 or 6 sheets, thereby simplifying a manufacturing process.

Growing community of inventors

Anyang, South Korea

Woo-Suk Chung