Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Woo-sik Kim

Seong-jin Kim

Sang-Il Kim

Sung-Wook Kim

Seung-Joo Shin

Kye-Si Kwon

Choul-Su Kim

Masaharu Tsukue

Seung-joo Shin

Byung-Hun Kim

Byung-woo Woo

A method and apparatus to check an operation of a piezoelectric inkjet head includes a first current detection unit to detect a first current output from a piezoelectric element of the piezoelectric inkjet head when a predetermined voltage is applied, a second current detection unit to detect a second current from a capacitor having a capacitance with the same magnitude as a capacitor component of the piezoelectric element when the voltage is applied to the capacitor, and a third current detection unit to detect a third current corresponding to a difference between the first current and the second current, as the amount of deformation of the piezoelectric element according to the application of the voltage.

Method and apparatus to check piezoelectric inkjet head

An inkjet head assembly and a printing method using the same. The inkjet head assembly includes an ultraviolet (UV) emitting unit to emit UV light, and a printhead to move together with the UV emitting unit and to eject ink through nozzles using inkjet technology.

Inkjet head assembly and printing apparatus with ultraviolet emitting unit and method using the same

A semiconductor device having a dual gate electrode and a method of forming the same are provided. The semiconductor device includes a substrate including first and second regions. A first gate electrode formed of a first metal silicide is disposed on the substrate of the first region. A second gate electrode is disposed on the substrate of the second region. The second gate electrode is formed of a second metal silicide including a metal the same as that of the first metal silicide. A gate insulating layer is interposed between the substrate and the first gate electrode, and between the substrate and the second gate electrode. The gate insulating layer brings about a Fermi pinning effect increasing or decreasing intrinsic work functions of the first and second metal silicides. In this case, the first metal silicide is a lower silicon concentration than the second metal silicide so that the Fermi pinning effect provided to the first gate electrode is less effective than that provided to the second gate electrode.

Semiconductor device having a dual gate electrode and methods of forming the same

Any one of at least two holding blocks loaded in a holding block storing portion is picked up and moved to cover an IC on a PCB of a PCB array. A light beam is applied to the whole surface of the PCB. The holding block is moved from the PCB to the holding block storing portion and cooled. It is then determined whether any other PCB to be soldered exists in the PCB array. If it is determined that any other PCB to be soldered exists in the PCB array, another holding block is picked up from the holding block storing portion and moved to cover an IC on the PCB of the PCB array. The above steps are repeated until all the PCBs of the PCB array to be soldered are completely soldered. If it is determined that any other PCB to be soldered does not exist in the PCB array, the PCB array is transferred to a subsequent process.

Method for soldering integrated circuits

Growing community of inventors

Yongin-si, South Korea

Woo-sik Kim