Hynix Semiconductor Inc.

Hyundai Electronics Industries Co. Ltd.

Samsung Sdi Co., Inc.

Woo-Seok Yang

Seung-Jin Yeom

Nam-Kyeong Kim

Soon-Yong Kweon

Hyung-Seok Oh

Yong-Sik Yu

Tok-Chin Woo

Deuk-Soo Pyun

An implosion preventing band for a cathode ray tube includes a main band formed around an outer surface of a skirt of a face panel, and including a pair of long sides provided on opposite sides of the skirt in a direction corresponding to long sides of a screen, a pair of short sides provided on opposite sides of the skirt in a direction corresponding to short sides of a screen, and corners formed between the long sides and the short sides to interconnect the same; and degaussing coil supports formed raised from the main band on long and short sides of the main band, and each having formed one or more openings that allow passage in a direction of a width of the main band, a degaussing coil(s) being supported using the openings. A plurality of the openings is formed continuously in the degaussing coil supports in a circumferential direction of the main band.

Implosion preventing band and cathode ray tube having the same

A ferroelectric memory device and a method for manufacturing the same is disclosed. Because a (Bi La )Ti O (BLT) layer, which can be crystallized in relatively low temperature, is used in a capacitor, the electrical characteristics of the ferroelectric capacitor can be improved. The method for manufacturing ferroelectric memory device includes the steps of forming a first conductive layer for a bottom electrode on a semiconductor substrate, forming the (Bi La )Ti O ferroelectric layer, wherein 'x' representing atomic concentration of Bi ranges from about 3.25 to about 3.35 and 'y' representing atomic concentration of La ranges from about 0.70 to about 0.90 and forming a second conductive layer for a top electrode on the (Bi La )Ti O ferroelectric layer.

FeRAM having BLT ferroelectric layer and method for forming the same

A method for forming a capacitor in a semiconductor device is disclosed, in which the dielectric medium of the capacitor is a ferroelectric film or a high dielectric constant film. In the method for forming a capacitor in a semiconductor device, peeling of the lower electrode is prevented, and the etch residues (organic polymer) which have been formed when carrying out a dry etching can be effectively removed.

Method for forming a capacitor in a semiconductor device

A semiconductor device for use in a memory cell includes an active matrix provided with a silicon substrate, a transistor formed on the silicon substrate, a capacitor structure formed over the transistor, a metal interconnection for electrically connecting the capacitor structure to the transistor, a barrier layer formed on top of the metal interconnection and an inter-metal dielectric (IMD) layer formed on top of the barrier layer, wherein the barrier layer is made of a material such as A1 O or the like. The IMD layer is formed by using a plasma chemical vapor deposition (CVD) in a hydrogen rich atmosphere, wherein the barrier layer is used for preventing the capacitor structure from the hydrogen.

Semiconductor device having a capacitor and method for the manufacture thereof

A method for fabricating a capacitor comprises the steps of performing a planarization process after forming a diffusion barrier on a semiconductor substrate including a plug and a silicide layer, depositing a adhesion layer on the entire structure and exposing the diffusion barrier by a selectively etching process, sequentially depositing a bottom electrode, a ferroelectric layer and a top electrode on the entire structure, forming a top electrode pattern performing a plasma etching process and a first recovery thermal treatment process and forming a ferroelectric layer and bottom electrode patterns by performing a plasma etching process and a second recovery thermal treatment process.

Method for fabricating capacitor

A semiconductor fabrication technique for forming a ferroelectric capacitor, in which the thermal burden is reduced by using an SBT-based ferroelectric thin film such as Sr Bi Ta O ('SBT') or Sr Bi (Ta Nb ) O ('SBT(N)') as the dielectric medium. The method includes the following steps. A strontium-bismuth-tantalum oxide film is formed on a semiconductor substrate, with a conductive film for a lower electrode having been formed on the semiconductor substrate (first step). An NH gas is flowed at a stabilizing step of a rapid thermal annealing so as to reduce organic materials bonded with metal elements of the strontium-bismuth-tantalum oxide film (second step). An oxide gas is flowed at a temperature of 450&tilde;650&deg; C. at an annealing step of the rapid thermal annealing so as to induce a perovskite nuclear formation in the strontium-bismuth-tantalum oxide film (third step). A furnace annealing is then carried out so as to induce a grain growth in the strontium-bismuth-tantalum oxide film (fourth step).

Method of forming ferroelectric capacitor in semiconductor device

A method for manufacturing a ferroelectric random access memory (FeRAM) device which includes the steps of preparing an active matrix provided with a transistor, diffusion regions, an isolation region, a bit line, a first insulating layer and a second insulating layer; forming a first conductive layer and then a dielectric layer on the active matrix; carrying out a rapid thermal annealing (RTA) for producing nuclei in the dielectric layer; forming a second conductive on top of the dielectric layer; carrying out a thermal annealing in a furnace; forming a capacitor structure provided with a top electrode, a capacitor thin film and a bottom electrode by patterning the second conductive, the dielectric and the first conductive layers into a first predetermined configuration; carrying out a first recovery; forming a third insulating layer on the capacitor structure and the second insulating layer; patterning the third insulating layer to form a first opening and a second opening; and carrying out a second recovery.

Method of manufacturing a semiconductor memory device incorporating a capacitor therein

A method for fabricating a ferroelectric capacitor in a ferroelectric memory device includes the steps of forming a first conductive layer on a semiconductor structure prepared for a formation of ferroelectric capacitor, forming a first ferroelectric layer on said first conductive layer, carrying out a rapid thermal annealing for nucleation in said ferroelectric layer, forming a second conductive layer on said ferroelectric layer, and carrying out a thermal treatment for a grain growth in said ferroelectric layer, thereby the interface characteristics are improved, reducing leakage currents and preventing a peeling phenomenon during a following etching process.

Growing community of inventors

Ichon-shi, South Korea

Woo-Seok Yang