Electronics and Telecommunications Research Institute

Woo Seok Cheong

Yong Goo Yoo

Eun Kyoung Kim

Mun Cheol Paek

Ho Jun Ryu

Sung Mook Chung

Hye Yong Chu

Sung Q Lee

Chi Sun Hwang

Min Ki Ryu

Jae Heon Shin

Jun Yong Bak

Jin Ho Lee

Kang Ho Park

Kyung Hyun Kim

Seong Jae Lee

Moon Gyu Jang

Doo Hee Cho

Ki Chul Kim

Jeong Dae Suh

Jae Kwang Lee

Rae Man Park

Provided herein is an electrostatic capacitive type window integrated touch screen panel and a method for manufacturing a touch screen panel thereof, the method comprising: forming an oxide metal oxide (OMO) hybrid electrode on a strengthened substrate; and etching the OMO hybrid electrode and forming a pattern, and forming a pattern insertion layer on the pattern, wherein the OMO hybrid electrode is formed by depositing a bottom-layer, metal-layer and top-layer on top of the strengthened substrate, and the pattern insertion layer is formed based on an oxide having a refractive index of a certain range.

Method for manufacturing touch screen panel and touch screen panel

Provided are a thin film transistor in which an oxide semiconductor combined with a nitride containing boron or aluminum is applied to a channel layer and a method of fabricating the same. The thin film transistor in which an oxide semiconductor combined with a nitride containing boron or aluminum is applied to a channel layer exhibits significantly improved mobility and increased stability at a high temperature.

Thin film transistor comprising oxide semiconductor

Thin film transistor and method of fabricating the same

Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

Method and apparatus for modeling source-drain current of thin film transistor

Provided is a method of fabricating a thin film transistor including source and drain electrodes, a novel channel layer, a gate insulating layer, and a gate electrode, which are formed on a substrate. The method includes the steps of forming the channel layer using an oxide semiconductor doped with boron; and patterning the channel layer. The channel layer formed is an oxide semiconductor thin film doped with boron. The electrical characteristics and high temperature stability of the thin film transistor are improved remarkably.

Method of fabricating a thin film transistor using boron-doped oxide semiconductor thin film

Provided are an electronic device to which vertical carbon nanotubes (CNTs) are applied and a method of manufacturing the same. The method of manufacturing an electronic device having a vertical CNT includes the steps of: (a) preparing a substrate on which a silicon source is formed; (b) forming a first insulating layer on the substrate, and etching the first insulating layer such that a top surface of the silicon source is exposed; (c) forming a second insulating layer on the silicon source, and forming a gate by patterning the second insulating layer; (d) forming a third insulating layer on the gate, and forming a through hole in which a carbon nanotube channel is to be formed by etching the third insulating layer and the second insulating layer; (e) forming a fourth insulating layer surrounding the gate on the through hole and the third insulating layer, and forming a spacer by etching the fourth insulating layer; (f) forming a metal catalyst on the silicon source; (g) vertically growing the carbon nanotube channel on the silicon source using the metal catalyst; (h) forming a fifth insulating layer on the through hole in which the carbon nanotube is formed and the third insulating layer; and (i) patterning the fifth insulating layer such that the carbon nanotube channel is exposed, and forming a silicon drain. An arrangement problem of horizontal CNTs can be solved by applying vertical CNTs and a selective silicon growth technique.

Electronic devices using carbon nanotubes having vertical structure and the manufacturing method thereof

Provided is a small form factor optical/magnetic disk including an integrated metal hub and a disk plate. The integrated metal hub includes a circular upper metal hub and a circular lower metal hub integrally formed with and disposed under the upper metal hub. The circular lower metal hub has a smaller diameter smaller than the upper metal hub. A central hole is formed in central portions of the upper and lower metal hubs and passes through the upper and lower metal hubs. The disk plate has a through-hole that is formed in a central portion and is directly associated with the integrated metal hub, and a recess that is formed around the through-hole and allows the upper metal hub to be mounted therein. Since the central portion of the small form factor optical/magnetic disk is not thick, the small form factor optical/magnetic disk can contribute to an ultra thin small form factor information storage device. Also, since manufacturing processes are simple, price and quality competitiveness can be enhanced.

Small form factor optical/magnetic disk for information storage

Provided is a form factor disk such as an optical or magnetic disk used in electronic appliances and information appliances. The form factor disk includes: a circular plate having a first hole for inserting a rotational shaft, a plurality of second holes formed adjacent to the first hole, and an information storage region formed at a surface thereof; an upper metal hub located on the circular plate, and having a hole aligned with the first hole of the circular plate and column-shaped joints formed at portions corresponding to the second holes of the circular plate; and a lower metal hub located under the circular plate, and having a hole aligned with the first hole of the circular plate and column-shaped joints formed at portions corresponding to the second holes of the circular plate, wherein the joints of the upper and lower metal hubs are jointed through the second holes.

Form factor disk

Provided is an apparatus and method of initializing a recording layer used in manufacturing a phase-change optical disk for storing information. The optical disk is initialized using a UV lamp in order to initialize the recording layer of the phase-change optical disk capable of repeatedly writing information, without a separate optical head, whereby it is possible to increase productivity by remarkably reducing an initialization time of the optical disk since a large area is initialized using a UV beam.

Apparatus and method of initializing phase-change optical disk

Provided is a method of manufacturing a thin film magnetic head. In particular, a method of manufacturing a thin film magnetic head is provided in which a flow process of a photoresist is applied to separate a hard magnetic layer and a metal multi-layer and a photoresist is used to insulate an upper electrode from a lower electrode in manufacturing a magnetic reproduction device, thereby simplifying and optimizing a manufacturing process and significantly reducing a manufacturing time.

Method of manufacturing thin film magnetic head

A schottky barrier transistor and a method of manufacturing the same are provided. The method includes forming a gate insulating layer and a gate on a substrate, forming a spacer on a sidewall of the gate, and growing a polycrystalline silicon layer and a monocrystalline silicon layer on the gate and the substrate, respectively, using a selective silicon growth. A metal is deposited on the polycrystalline silicon layer and the monocrystalline silicon layer. Then, the metal reacts with silicon of the polycrystalline silicon layer and the monocyrstalline silicon layer to form a self-aligned metal silicide layer. Therefore, selective wet etching for removing an unreacted metal after silicidation can be omitted. Furthermore, etching damage caused during the formation of the spacer can be decreased during the growth of the monocrystalline silicon layer, thereby improving the electrical characteristics of devices.

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Daejeon, South Korea

Woo Seok Cheong