Intel Corporation

Wonjae L Kang

Jonathan H Liu

Embodiments of the invention include on-chip transistor degradation detection and compensation. In one embodiment of the invention, an integrated circuit is provided including a circuit with a body bias terminal coupled to a body of one or more transistors to receive a body bias voltage; a programmable degradation monitor to detect aging of transistors, and a body bias voltage generator coupled to the circuit and the programmable degradation monitor. The body bias voltage generator to adjust the body bias voltage coupled into the circuit in response to transistor aging detected by the programmable degradation monitor. The programmable degradation monitor includes a reference ring oscillator, an aged ring oscillator, and a comparison circuit. The comparison circuit to compare data delays in the reference ring oscillator and the aged ring oscillator to detect transistor aging within the integrated circuit.

Body bias compensation for aged transistors

The present invention is related to method and apparatus for on-die noise detection that includes one more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.

Method for detection and quantification of on-die voltage noise in microcircuits

An on-die noise detection circuit includes one or more voltage noise sensors, and one or more associated comparators. The voltage noise sensor includes a circuit including devices designed to position an initial voltage level of nodes between the devices at certain levels. The nodes are paired where the initial level of one node is above the initial level of the other node in the pair. The devices are designed to position the initial voltage levels of nodes of each pair such that the occurrence of noise above a predefined threshold voltage causes at least one of the voltage levels at the pair of nodes to approach and pass the other. The comparator monitors the voltage levels of each pair of nodes and generates a trigger signal upon detection of the voltage levels at a pair of nodes passing each other.

Method and apparatus for detection and quantification of on-die voltage noise in microcircuits

A method for blowing a fuse in an IC device using the current generated by latchup. A fuse comprising a conductive material is caused to electrically open by directing a latchup current through the conductive material. The latchup current is generated by properly biasing parasitic bipolar transistors formed within the semiconductor substrate of the IC device, causing these parasitic transistors to latch up.

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San Jose, CA, United States of America

Wonjae L Kang