Samsung Electronics Co., Ltd.

Won-sik Lee

Young-pil Kim

Yong-hee Lee

Jong-bok Kim

A method is provided for manufacturing a capacitor of a semiconductor device. First, an insulating layer, an etching barrier layer, a first material layer and a second material layer are sequentially stacked on a semiconductor substrate on which a field oxide layer and a gate electrode are formed, and predetermined portions of the stacked layers are sequentially etched to form a contact hole exposing the substrate. Then, a first conductive layer is formed on thge whole surface of the resultant structure having the contact hole. Subsequently, a storage electrode pattern is formed by patterning the first conductive layer and etching the second material layer. Then, a second conductive layer is formed on the whole surface of the resultant structure so as to cover the storage electrode pattern and the first material layer. Thereafter, the second conductive layer is etched to expose the upper surface of the storage electrode pattern. Therefore, the capacitor manufacturing process, particularly, the etching process, is simplified, and can be applied to a capacitor having a COB structure.

Semiconductor device capacitor manufactured by forming stack with

An improved test pattern for monitoring variations of critical dimensions of patterns produced during the fabrication of semiconductor devices is disclosed. The test pattern which allows the critical dimensions to be easily monitored by a microscope, has a reference pattern including a reference line corresponding to one vertical edge of the reference pattern, said reference pattern formed flatly in a given layer below the present layer, a step shaped first pattern including a plurality of vertical indication step line segments corresponding to each vertical edge of the step and being formed flatly in the present layer, each extending line of said line segments being spaced by an equal horizontal interval and one of said line segments lying in the reference line, and a step shaped second pattern including a plurality of vertical indication step line segments corresponding to vertical edges of the step of the second pattern and being formed in separation from the first pattern in the present layer, each of said line segments of the second pattern being arranged on the extending line of each line segment of the first pattern.

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Seoul, South Korea

Won-sik Lee