Samsung Electronics Co., Ltd.

Won-sik Kang

Jae-Goo Lee

Jong-Kon Bae

Jae-hyuck Woo

Yang-Hyo Kim

Jae-Ho Park

Seong-Cheol Kim

In-Suk Kim

Kyu-Young Chung

Hyung-Tae Kim

Chul Jun Choi

Ji-Woon Jung

Jae-Hyuck Woo

Sung-jin Jang

Jee-woo Park

An image driving device includes a determining unit, and image processing unit, and a memory. The determining unit determines whether an input image is a moving image or a still image, and may be synchronized with an internal clock different from an external clock. The image processing unit may image-process at least one frame but less than all frames of the input image when the input image is determined to be a still image. The image processing unit may output the at least one image-processed frame as first image data, and the memory may store the first image data.

Image driving device, electronic device including image driving device, and image driving method

A display driving device includes a first source amplifier that receives first display data and supplies a first pixel voltage to a first pixel based on the received first display data, and a second source amplifier that receives second display data and first control data and supplies a second pixel voltage to a second pixel based on the received second display data and first control data. The second source amplifier has a first stage in which a first process is performed on an input signal based on the second display data, and a second stage in which a second process is performed on the first processed input signal to output the second pixel voltage. The first source amplifier may be configured to conditionally supply the first pixel voltage to the second pixel.

Display driving device for driving each of more than two pixels, display apparatus and method for operating the same

Provided are an output buffer circuit having an amplifier offset compensation function and a source driving circuit including the output buffer circuit. The output buffer circuit may include a plurality of channel amplifiers, each of which is configured to adjust an amount of current flowing through transistors connected to at least one of a non-inverted input terminal and an inverted input terminal of a differential input unit to compensate an amplifier offset, and adjust buffer input voltage signals to generate output voltage signals.

Buffer circuit having amplifier offset compensation and source driving circuit including the same

A display driving circuit includes first through (2*n)-th buffers, a buffer controller, first through n-th image processing units, and a source driver. The buffer controller circularly selects one of the first through (2*n)-th buffers in an order from the first buffer to the (2*n)-th buffer at each of a plurality of first time intervals, and stores pixel data received during the first time interval in the selected buffer. Each of the first through n-th image processing units is coupled to two corresponding buffers among the first through (2*n)-th buffers, and processes the pixel data, which are stored in at least one of their corresponding buffers, during n of the first time intervals to generate processed data when the pixel data are stored in the corresponding buffer during the first time interval. The source driver generates analog signals based on the processed data.

Display driving circuit and a display device having the same

A voltage generator includes a boosting circuit boosting a power voltage to generate first through fourth voltages, and a boosting controller controlling the boosting circuit. The boosting controller sets the third and fourth voltages to a voltage level lower than that of a ground voltage while the first and second voltages are generated, so that a plurality of voltages may be stably generated, i.e., without latch-up.

Methods and apparatus for latch-up free boosting

A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.

Panel driving circuit that generates panel test pattern and panel test method thereof

Boosting circuit providing a plurality of voltages for latch-up free boosting and associated methods thereof

A display driver integrated circuit (IC) that stores an output mode of driving circuit control signal in a non-volatile memory and a method of outputting the driving circuit control signal, wherein the display drive IC fixes the driving circuit control signal values using fixation wire disposed on top layers of the display driver IC, and a method of manufacturing the display driver IC. The display driver IC includes a plurality of driving circuits, which operate a display panel; a driving circuit control signal output unit, which outputs a plurality of driving circuit control signal values, which control the driving circuits, received from an external device in a test mode, or outputs the plurality of driving circuit control signal values, which control the driving circuits that are internally set to a plurality of fixed values in a production mode; and a non-volatile memory, which stores a mode selection value indicating the test mode or the production mode, wherein the driving circuit control signal output unit operates in the test mode or the production mode in response to the mode selection value stored in the non-volatile memory. In the display drive IC, which stores an output mode of a driving circuit control signal in a non-volatile memory, and a method of outputting the driving circuit control signal, whether to fix a driving circuit control signal value or not can be changed after the display driver IC is assembled into a module.

Display driver integrated circuit which stores output mode of driving circuit control signal in non-volatile memory and method of outputting the driving circuit control signal

A voltage generators is provided including a boosting circuit and a boosting control circuit. The boosting circuit is configured to boost a power voltage to generate first through fourth voltages. The boosting control circuit is configured to control the boosting circuit to enable the first through fourth voltages to be generated in sequence, such that when a current voltage of the first through fourth voltages is boosted to a predetermined level, a voltage next to the current voltage is generated. Related liquid crystal displays and methods are also provided.

Voltage generators implementing boosting schemes for generating boosting voltages and related methods

Provided are a timing controller, a liquid crystal display (LCD) driver including the same, and a method of outputting display data, where the timing controller receives a vertical synchronous signal and a data enable signal, generates an internal data enable signal having a period that is longer than the period of the data enable signal in response to the vertical synchronous signal and the data enable signal, and updates a memory using the internal data enable signal; where the LCD driver including the timing controller outputs display data stored in a memory device based on the internal data enable signal; where a data line driving circuit drives data lines based on the output display data; and where the method of outputting display data is performed by the LCD driver.

Portable electronic display device having a timing controller that reduces power consumption

A liquid crystal display (LCD) that includes a plurality of pixels, a switch unit, and a gate line driving unit. Each of the pixels includes a liquid crystal capacitor having a pixel electrode and a common electrode, and the pixels are located at intersections of a plurality of gate lines and a plurality of source lines. The switch unit applies source line driving voltages having levels opposite to a common voltage applied to the common electrode, to the source lines. The gate line driving unit sequentially outputs via gate lines gate line driving voltages to control the source line driving voltages to be applied to the pixel electrodes of the pixels. The common voltage transits from a first level to a second level or vice versa at the boundary between a first half frame and a second half frame. At the first half frame, the switch unit applies the source line driving voltages to only odd-numbered source lines. At the second half frame, the switch unit applies the source line driving voltage to only even-numbered source lines.

Liquid crystal display device and method of driving the same

A method of automatically recovering bit values of a control register includes storing command data inputted from a host in the control register and a portion of a graphic RAM (GRAM), and while a scanning operation is performed by the GRAM, outputting the command data stored in the GRAM to the control register and refreshing the control register.

Method of automatically recovering bit values of control register and LCD drive integrated circuit for performing the same

A data error correction circuit includes a plurality of one-bit registers, a data error detection unit and a data error correction unit. The data error detection unit detects whether all the data values stored in the plurality of the registers are equal. The data correction unit determines a correct data value based upon each of the stored data values, and corrects each of the data values into the determined correct data value if the data values are not equal. Therefore, the data error correction circuit may correct a data error due to electrostatic discharge (ESD) or electromagnetic interference (EMI).

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Seoul, South Korea

Won-sik Kang