Lg Display Co., Ltd.

Won-Joon Ho

Hee-Jung Yang

Dong-Sun Kim

Gyu-Won Han

Jae-Young Jeong

Hyung-Tae Kim

A-Ra Kim

Seok-Won Kim

Hyuk-Jin Kwon

Chang-Mo Yoo

Dong-sun Kim

Seung-Won Jung

Du-Seok Oh

A method of fabricating an array substrate including forming an oxide semiconductor layer on a substrate; sequentially forming a gate insulating layer and a gate electrode corresponding to a central portion of the oxide semiconductor layer; forming source and drain areas having conductive properties in the oxide semiconductor layer by irradiating X-rays or UV rays to the oxide semiconductor layer exposed outside the gate electrode; forming an inter insulating layer on the gate electrode and having first contact holes that expose the source and drain areas; and forming source and drain electrodes on the inter insulating layer and contacting the source and drain areas through the first contact holes, respectively.

Method of fabricating array substrate

A display device according to an embodiment includes a display panel and a circuit board connected to the display panel. The circuit board is connected to a bonding area of the display panel by an anisotropic conductive film. The display panel includes a cover insulating layer exposing the bonding area. The cover insulating layer includes at least one trench crossing an edge area, which is located outside the bonding area.

Display device having signal line extending to non-display area

A method of fabrication an array substrate which includes foaming an oxide semiconductor layer on a substrate; forming a gate insulating layer corresponding to a central portion of the oxide semiconductor layer; forming a first reactive metallic pattern and second reactive metallic patterns on the gate insulating layer and portions of the oxide semiconductor layer exposed outside the gate insulating layer, respectively; forming a gate electrode on the first reactive metallic pattern; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing heat treatment such that materials of the second reactive metallic patterns are diffused into the oxide semiconductor layer contacting the second reactive metallic patterns; forming an inter insulating layer on the gate electrode and having first contact holes that expose the second reactive metallic patterns; and forming source and drain electrodes on the inter insulating layer and contacting the second reactive metallic patterns through the first contact holes, respectively.

A method of fabrication an array substrate includes forming an oxide semiconductor layer on a substrate; sequentially forming a gate insulating layer and a gate electrode corresponding to a central portion of the oxide semiconductor layer; forming source and drain areas having conductive properties in the oxide semiconductor layer by performing hydrogen plasma treatment; forming barrier layers on the source and drain areas, the barrier layer having a first thickness; forming an inter insulating layer on the gate electrode and having first contact holes that expose the barrier layers; and forming source and drain electrodes on the inter insulating layer and contacting the barrier layers through the first contact holes, respectively.

An oxide thin film transistor (TFT) includes an oxide semiconductor layer including a first semiconductor layer and a second semiconductor layer on the first semiconductor layer; a gate insulating layer on the oxide semiconductor layer; a gate electrode on the gate insulating layer; an interlayer insulating layer on the gate electrode; and a source electrode and a drain electrode on the interlayer insulating layer and contacting the oxide semiconductor layer, wherein a first reflectance of the first semiconductor layer is greater than a second semiconductor layer.

Thin film transistor with oxide semiconductor having a portion with increased reflectance

An array substrate including: a gate barrier layer on a substrate; a gate line on the gate barrier layer, the gate line having a gate open portion exposing the gate barrier layer in a gate electrode region; a gate insulating layer on the gate line; an active layer on the gate insulating layer over the gate barrier layer in the gate electrode region; and source and drain electrodes spaced apart from each other on the active layer.

Array substrate including oxide thin film transistor and method of fabricating the same

A method of fabricating an array substrate for a liquid crystal display device includes: forming an initial photoresist (PR) pattern on a metallic material layer; etching the metallic material layer using the initial PR pattern as an etching mask to form the data line and a metallic material pattern, wherein the initial PR pattern is disposed on the data line; performing a first ashing process onto the initial PR pattern to partially remove the initial PR pattern so as to form a first ashed PR pattern, the first ashed PR pattern having a smaller width and a smaller thickness than the initial PR pattern such that end portions of the data line are exposed by the first ashed PR pattern; etching the intrinsic amorphous silicon layer and the impurity-doped amorphous silicon layer by a first dry-etching process; forming a source electrode and a drain electrode on the substrate.

Array substrate for liquid crystal display device and method of fabricating the same

According to an embodiment, a method of fabricating a thin film transistor comprises forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming a semiconductor layer on the gate insulating layer, the semiconductor layer corresponding to the gate electrode; forming first and second barrier patterns on the semiconductor layer, the first and second barrier patterns including copper nitride; and forming source and drain electrodes on the first and second barrier patterns, respectively, the source and drain electrodes including pure copper.

Growing community of inventors

Jeonju-si, South Korea

Won-Joon Ho