Skhynix Inc.

Hynix Semiconductor Inc.

Toshiba Memory Corporation

Won Joon Choi

Heung Jae Cho

Yong Soo Kim

Moon Sig Joo

Daisuke Watanabe

Toshihiko Nagase

Kazuya Sawada

Koji Ueda

Makoto Nagamine

Youngmin Eeh

Dong Sun Sheen

Young Ho Yang

Bo Mi Lee

Min Sung Ko

Jong Gi Kim

Guk Cheon Kim

Woo Jae Chung

Jung Myoung Shim

Hyeng Woo Eom

Kwang Wook Lee

Kyeong Bae Kim

Yang Kon Kim

Ki Seon Park

Sung Jin Whang

The method of manufacturing a semiconductor device include: forming conductive patterns in interlayer spaces between interlayer insulating layers, the conductive patterns being separated from each other by a slit passing through the interlayer insulating layers, wherein the conductive patterns include a first by-product; generating a second by-product of a gas phase by reacting the first by-product remaining in the conductive patterns with source gas; and performing an out-gassing process to remove the second by-product.

Method of manufacturing semiconductor device

Method of manufacturing semiconductor device through by-product removal from conductive layer

According to one embodiment, there is provided a magnetoresistive element, including a first magnetic layer, a nonmagnetic layer on the first magnetic layer, and a second magnetic layer on the nonmagnetic layer, wherein one of the first and second magnetic layers include one of Co and Fe, and a material having a higher standard electrode potential than Co and Fe.

Magnetoresistive element

According to one embodiment, a magnetic memory includes a first magnetic layer, a second magnetic layer, a non-magnetic intermediate layer provided between the first magnetic layer and the second magnetic layer and an underlying layer provided on an opposite side of the first magnetic layer with respect to the intermediate layer, and the underlying layer contains AlN of a hcp structure.

Magnetic memory and manufacturing method of the same

In a method for fabricating a magnetic tunnel junction, a first magnetic layer is formed on a substrate, and a tunnel insulating layer is formed on the first magnetic layer. Subsequently, a second magnetic layer is formed on the tunnel insulating layer. In the method, the first magnetic layer is formed by periodically sputtering a magnetic target while a metal target is continuously sputtered.

Semiconductor fabricating device and method for driving the same, and method for fabricating magnetic tunnel junction using the same

A magnetic tunnel junction device includes a first electrode having a curved top surface, a magnetic tunnel junction layer formed along the top surface of the first electrode, and a second electrode formed on the magnetic tunnel junction layer.

Magnetic tunnel junction device and method for fabricating the same

A magnetic resistance memory apparatus capable of implementing various levels and a method of driving the same are provided. The magnetic resistance memory apparatus includes a first magnetic device that includes a fixed layer having a fixed magnetization direction, a tunnel layer disposed on the fixed layer, and a first free layer disposed on the tunnel layer having a variable magnetization direction, and a second magnetic device disposed on the first magnetic device including a plurality of free layers insulated with a spacer layer interposed.

Magnetic resistance memory apparatus having multi levels and method of driving the same

Magnentic resistance memory apparatus having multi levels and method of driving the same

A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation layer pattern and the floating gate electrode layer pattern; forming an isolation layer by filling the isolation trench with a filling insulation layer; forming a hafnium-rich hafnium silicon oxide layer over the isolation layer and the floating gate electrode layer pattern; forming a hafnium-rich hafnium silicon oxynitride layer by carrying out a first nitridation on the hafnium-rich hafnium silicon oxide layer; forming a silicon-rich hafnium silicon oxide layer over the hafnium-rich hafnium silicon oxynitride layer; forming a silicon-rich hafnium silicon oxynitride layer by carrying out a second nitridation on the silicon-rich hafnium silicon oxide layer; and forming a control gate electrode layer over the silicon-rich hafnium silicon oxynitride layer.

Method of fabricating non-volatile memory device

A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the first dielectric layer over the first dielectric layer; forming a nitride buffer layer for preventing an interfacial reaction over the second dielectric layer; forming a third dielectric layer by supplying a radical oxidation source onto the nitride buffer layer to oxidize the nitride buffer layer, thereby forming a tunneling layer comprising the first, second, and third dielectric layers; and forming a charge trap layer, a shielding layer, and a control gate electrode layer over the tunneling layer.

Method for manufacturing non-volatile memory device having charge trap layer

Growing community of inventors

Seoul, South Korea

Won Joon Choi