Samsung Electronics Co., Ltd.

Won-hyung Song

Hongzhong Zheng

Dimin Niu

Mu-Tien Chang

Hyun-Joong Kim

Jangseok Choi

Yong-jin Kim

Jaejun Lee

Jungjoon Lee

Kyoungsun Kim

Sangseok Kang

Do-Hyung Kim

Young-Ho Lee

Jin-hyun Kim

Jong-hyun Seok

Jung Min You

Jinhyun Kim

Ju-yun Jung

Seong-Jin Cho

Jihyun Choi

Ho-Youn Kim

Duk-Sung Kim

Soo-Woong Ahn

Oh-Seong Kwon

Hi Jung Kim

Hoki Kim

Ha-Ryong Yoon

A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

DRAM assist error correction mechanism for DDR SDRAM interface

Disclosed is a method for accessing memory cells arranged in rows and columns. The method includes activating a specific row of the rows of the memory cells, and flipping data bits stored in memory cells of the specific row in response to determining that concentrated activation occurs at the specific row.

Compensating for concentrated activation of memory cells in a semiconductor memory device

A memory device includes memory cells connected to a first word-line, wherein the memory cells include a data region in which data is stored and a counting value backup region in which the number of times the first word-line is activated is backed up, a counting table for storing a first row address corresponding to the first word-line and a first counting value as a counting result of the number of times the first word-line is activated, and a comparator configured to compare the first counting value with a first backed-up counting value stored in the counting value backup region; and when the first counting value is greater than the first backed-up counting value, back up the first counting value in the counting value backup region, or when the first backed-up counting value is greater than the first counting value, overwrite the first backed-up counting value into the counting table.

Memory device and memory system

Provided are a memory package, an expansion memory module, and a multi-module memory system. A base memory module, to/from which an expansion memory module is capable of being attached/detached, includes a module board, a plurality of module terminals arranged on the module board to be connected to a slot, and a plurality of memory packages, each of which including a first surface to be attached to the module board and a second surface opposite to the first surface facing away from the module board, wherein each of the plurality of memory packages includes a plurality of package terminals exposed on the second surface of the memory package to be connected to the expansion memory module.

Memory package including buffer, expansion memory module, and multi-module memory system

A memory controller is disclosed. The memory controller may include read circuitry to request a value at an address stored in a plurality of data chips, parity circuitry to calculate a parity from original data received from the plurality of the data chips, pollution pattern analysis circuitry to compare the parity with a plurality of pollution patterns programmed into the plurality of the data chips to identify a data chip with an error, and error correction circuitry to correct the error in the original data received from the identified data chip with the error.

Method to deliver in-DRAM ECC information through DDR bus

A data chip that may pollute data is disclosed. The data chip may include a data array, read circuitry to read raw data from the data array, and a buffer to store the raw data. Using a pollution pattern stored in a mask register, a data pollution engine may pollute the raw data. Transmission circuitry may then transmit the polluted data.

Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a memory cell array; a standard cell region in which first type standard cells implemented to perform a first operation for accessing the memory cell array and second type standard cells performing the first operation and having performance characteristics different from performance characteristics of the first type standard cells are arranged; and a ROM including a program that performs place and route for the standard cells arranged in the standard cell region.

Integrated circuit memory devices with customizable standard cell logic

A memory device that checks an error of a memory cell and a memory module including the same are disclosed. The memory module includes a first memory device and a second memory device. The first memory device includes a first area in which normal data are stored, and a second area in which error check data are stored. The second memory device stores reliability information about the normal data that is stored in the first area of the first memory device. The first memory device outputs a result of comparing the normal data read from the first area of the first memory device to the error check data read from the second area of the first memory device.

Memory device with error check function of memory cell array and memory module including the same

Growing community of inventors

Osan-si, South Korea

Won-hyung Song