Micron Technology Incorporated

Infineon Technologies Ag

Qimonda Ag

Wolfgang Anton Spirkl

Thomas Hein

Martin Brox

Peter Mayer

Michael Dieter Richter

Detlev Richter

Markus Balb

Christoph Bilger

Timothy Mowry Hollis

Roy Edgar Greeff

Stefan Dietrich

Peter Gregorius

Hermann Ruckerbauer

Gunnar H Krause

Johannes Stecker

Thilo Schaffroth

Holger Steffens

Jean-Marc Dortu

Ralf Arnold

Martin Maier

Phillip A Rasmussen

Ralf Schedel

Gerd Frankowsky

Robert Kaiser

Justus Kuhn

Andreas Schneider

Roderick McConnell

Casto Salobrena Garcia

Volker Kilian

Sebastian Kuhne

Thomas Nirmaier

Paul Schm&ouml;lz

Gunter Schmid

Thomas Janik

Stefan Sommer

Andrea Sorrentino

Jens Braun

Marcos Alvarez Gonzalez

Timothy M Hollis

Roy Greeff

Methods, systems, and devices for memory operations that support configuring a channel, such as a command/address (C/A) channel, are described. A configuration of a C/A channel may be dynamically adapted based on power saving considerations, control information execution latency, or both. Configuring a C/A channel may include determining a quantity of pins, or a quantity of cycles, both for communicating control information over the C/A channel. The quantity of pins may be determined based on previous control information transmissions, characteristics of a memory device, or predicted control information transmissions, or any combination thereof in some cases. The determined quantity of pins, quantity of cycles, or both may be explicitly or implicitly indicated to other devices (e.g., that use the C/A channel).

Configuring command/address channel for memory

Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal modulated using a first modulation scheme and communicate a second signal that is based on the first signal and that is modulated using a second modulation scheme. The first modulation scheme may include a first quantity of voltage levels that span a first range of voltages, and the second modulation scheme may include a second quantity of voltage levels that span a second range of voltages different than (e.g., smaller than) the first range of voltages. The first signal may include write data carried over a data channel, and the second signal may include error detection information based on the write data that is carried over an error detection channel.

Channel modulation for a memory device

Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds are configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device configures a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device tracks or counts errors in the data and determine whether the threshold has been satisfied. The memory device transmits (e.g., to the host device) an indication whether the threshold has been satisfied, and the system performs functions to correct the errors and/or prevent further errors. The memory device also identifies errors in received commands or identifies errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).

Dynamic control of error management and signaling

Methods, systems, and devices for controlled and mode-dependent heating of a memory device are described. In various examples, a memory device or an apparatus that includes a memory device may have circuitry configured to heat the memory device. The circuitry configured to heat the memory device may be activated, deactivated, or otherwise operated based on an indication of a temperature (e.g., of the memory device). In some examples, activating or otherwise operating the circuitry configured to heat the memory device may be based on an operating mode (e.g., of the memory device), which may be associated with certain access operations or operational states (e.g., of the memory device). Various operations or operating modes (e.g., of the memory device) may also be based on indications of a temperature (e.g., of the memory device).

Controlled heating of a memory device

Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.

Drive strength calibration for multi-level signaling

Systems, apparatuses, and methods for transmission failure feedback associated with a memory device are described. A memory device may detect errors in received data and transmit an indication of the error when detected. The memory device may receive data and checksum information for the data from a controller. The memory device may generate a checksum for the received data and may detect transmission errors. The memory device may transmit an indication of detected errors to the controller, and the indication may be transmitted using a line that is different than an error detection code (EDC) line. A low-speed tracking clock signal may also be transmitted by the memory device over a line different than the EDC line. The memory device may transmit a generated checksum to the controller with a time offset applied to the checksum signaled over the EDC line.

Transmission failure feedback schemes for reducing crosstalk

Methods, systems, and devices for tracking a reference voltage (also referred to as V) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.

Tracking a reference voltage after boot-up

Methods, systems, and devices for operating memory cell(s) using adapting the current on a channel are described. A current on a channel may be adapted during a transition period between signaling a first logic value over the channel and signaling a second (e.g. subsequent) logic value over the channel. Adapting the current may include increasing or decreasing the current on the channel during the transition period. The degree of adaptation may be based on a difference between the first logic value and the subsequent logic value. In some cases, a logic circuit may be configured to determine a difference between the first and subsequent logic value. The logic circuit may be further configured to communicate the difference to an adaptive driver. And the adaptive driver may adapt a current of the channel based on the communicated difference.

Adapting channel current

Systems, methods, and apparatuses for offset cancellation are described. A memory device may determine that a channel is in a state that interrupts an active termination of the channel and enable the calibration of a reference voltage (e.g., by the memory device). For example, a channel used for data communications with a second device (e.g., a controller) may initially be in a state of active termination. The memory device may determine that the channel has transitioned to another state that interrupts the active termination. While the channel is in the other state, the memory device may calibrate a reference voltage of a receiver by transmitting calibration signals on the channel and detecting an offset associated with a reference voltage. The memory device may use the detected offset and the reference voltage to identify signals transmitted to the memory device over the channel.

Offset cancellation

Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may determine a value for a parameter for operating the memory device—such as a timing, voltage, or frequency parameter—based on the temperature of the memory device. The host device may transmit signaling to the memory device or another component of the system based on the value of the parameter. In some cases, the host device may determine the temperature of the memory device based on an indication (e.g., provided by the memory device). In some cases, the host device may determine the temperature of the memory device based on a temperature of the host device or a temperature of another component of the system.

Temperature-based memory management

Methods, systems, and devices for signal path biasing in an electronic system (e.g., a memory system) are described. In one example, a memory device, a host device, or both may be configured to bias a signal path, between an idle state and an information transfer or between an information transfer and an idle state, to an intermediate or mid-bias voltage level, which may reduce signal interference associated with such transitions. In various examples, the described biasing to a voltage, such as a mid-bias voltage, may be associated with an access command or other command for information to be communicated between devices of the electronic system, such as a command for information to be communicated between a memory device and a host device.

Signal path biasing in a memory system

Methods, systems, and devices for masked training and analysis with a memory array are described. A memory device may operate in a first mode in which a maximum transition avoidance (MTA) decoder for a memory array of the memory device is disabled. During the first mode, the memory device may couple an input node of the MTA decoder with a first output node of a first decoder, such as a first pulse amplitude modulation (PAM) decoder. The memory device may operate in a second mode in which the MTA decoder for the memory array is enabled. During the second mode, the memory device may couple the input node of the MTA decoder with a second output node of a second decoder, such as a second PAM decoder.

Masked training and analysis with a memory array

Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).

Mode-dependent heating of a memory device

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Germering, Germany

Wolfgang Anton Spirkl