Raytheon Company

Teraforce Technology Corporation

Ge Fanuc Embedded Systems, Inc.

Winthrop W Smith

James R Bartlett

Daniel W Otts

Benjamin M Howe

Jay T Labhart

In certain embodiments, an apparatus comprises range matched filters and a Doppler-acceleration matched filter system. The matched filters are configured to receive radar return signals detected by an antenna and range match filter the radar return signals to place the radar return signals into range cells. The Doppler-acceleration matched filter system is configured to Doppler-acceleration process the radar return signals in the range cells to facilitate identification of one or more targets.

Processing radar return signals to detect targets

In particular embodiments, analyzing data includes receiving sensor data generated in response to sensing one or more structures. The structural features of the sensor data are identified. Each structural feature is represented by one or more vectors. A score matrix that describes a plurality of distances among the vectors is generated. Vector pairs are formed from at least some of the vectors according to the distances of the score matrix. A layout of the structures is generated from the vector pairs.

Fusing multi-sensor data to provide estimates of structures

A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal processing functions configurably embedded in series with the communication paths and/or the I/O paths. Each processor is provided with a local memory which can be accessed by the local processor as well as by the other processors via the communications paths. This allows for efficient data movement from one processor's local memory to another processor's local memory, such as commonly done during signal processing corner turning operations. The configurable signal processing logic may be configured to host one or more signal processing functions to allow data to be processed prior to its deposit into local memory.

Signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements

A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal processing functions configurably embedded in series with the communication paths and/or the I/O paths. Each processor is provided with a local memory which can be accessed by the local processor as well as by the other processors via the communications paths. This allows for efficient data movement from one processor's local memory to another processor's local memory, such as commonly done during signal processing corner turning operations. Configurable signal processing logic may be configured to host one or more signal processing functions which allow data to be autonomously accessed from the processor local memories, processed, and re-deposited in a local memory.

Autonomous signal processing resource for selective series processing of data in transit on communications paths in multi-processor arrangements

A quad-processor arrangement having 6 communications paths, one path between each of every possible pair of processors. Each processor is provided with a local memory which can be accessed by the local processor as well as by the other processors via the communications paths. This allows for efficient data movement from one processor's local memory to another processor's local memory, such as commonly done during signal processing corner turning operations. The communications paths are controlled and interfaced to the processors through field programmable logic, which allows the board to be configured both statically and dynamically to optimize the data transfer characteristics of the module to match the requirements of the application software. The programmable logic may be configured so that the module emulates other existing board architectures in order to support legacy applications.

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Richardson, TX, United States of America

Winthrop W Smith