Aurora Systems, Inc.

Apple Inc.

Omnivision Technologies, Inc.

Wing Hong Chow

William Spencer Worley, Iii

Edwin Lyle Hudson

William Thomas Weatherford

W Spencer Worley, Iii

Robert L Bailey

W Spencer Iii Worley

A multiplexed pixel display includes a plurality of pixel electrodes, a plurality of storage elements, a first voltage supply terminal, a second voltage supply terminal, a common electrode, and a plurality of multiplexers each selectively coupling an associated one of the pixel electrodes with one of the first voltage supply terminal and the second voltage supply terminal responsive to a value of a data bit stored in an associated one of said storage elements. A controller is configured to sequentially write each bit of multi-bit data words to the storage elements, and assert, while each bit is stored in the storage elements, a first predetermined voltage on the first voltage supply terminal, a second predetermined voltage on the second voltage supply terminal, and a third predetermined voltage on the common electrode, for a time dependent on the significance of the stored bit. Various alternate controllers facilitate the use of additional driving schemes.

Display with multiplexed pixels and driving methods

Display with multiplexed pixels

A system and method for reducing the phase difference between adjacent gray scale values employ compound data words. The compound data words include a first group of data bits and a second group of data bits. A display driver circuit is configured to provide display control signals causing each bit of the first group of data bits to be asserted on the display pixel for a coequal time period, and causing each bit of the second group of data bits to be asserted on the display pixel for a time period dependent on an associated significance of each bit. Optionally, the display driver circuit further includes a compound data generator configured to provide the compound data words. A method for asserting a compound data word on a display pixel includes the steps of asserting each bit of the first group of bits on the display pixel for a coequal time period, and asserting each bit of the second group of bits on the display pixel for a time period dependent on an associated significance of each bit.

System and method for using compound data words to reduce the data phase

A system and method for planarizing n-bit display data into m-bit data. The system includes a plurality of input terminals, a plurality of output terminals, and a first storage bank having a bit-depth less than m. In one embodiment, the first storage bank is a bi-directional shift register including a clock input terminal, for receiving a data shift signal, and a direction terminal for receiving a direction control signal. In a particular embodiment, the bi-directional shift register includes a plurality of flip-flops and a plurality of multiplexers, both arranged in a rectangular array of columns and rows. Optionally, the system includes a second storage bank, and data is shifted into one storage bank while data is being shifted out of the other storage bank.

System and method for data planarization

A method for writing data to a display, wherein logical segments (groups of rows) are dynamically redefined to displace the intersegment boundaries and delocalize inter-pixel electrical fields occurring across the intersegment boundaries. One particular method includes the steps of grouping rows of a display to define the logical segments, writing data to at least one of the logical segments, writing a predefined value to each of the logical segments, regrouping the rows of the display to redefine the logical segments, and writing data to at least one of the redefined segments. Code contained in an electronically readable medium, for example a memory device, causes a display driver circuit to write data to a display in accordance with the described methods.

System and method for reducing inter-pixel distortion by dynamic

A method for displaying multi-bit data words on a display including a plurality of pixel electrodes, a plurality of storage elements, a first voltage supply terminal, a second voltage supply terminal, a common electrode, and a plurality of multiplexers each selectively coupling an associated one of the pixel electrodes with one of the first voltage supply terminal and the second voltage supply terminal responsive to a value of a data bit stored in an associated one of said storage elements, includes the steps of sequentially writing each bit of the multi-bit data words to the storage elements, and asserting, while each bit is stored in the storage elements, a first predetermined voltage on the first voltage supply terminal, a second predetermined voltage on the second voltage supply terminal, and a third predetermined voltage on the common electrode, for a time dependent on the significance of the stored bit.

Method for modulating a multiplexed pixel display

An improved ring oscillator in which frequency drift is controlled to provide reasonable accuracy is disclosed. The improved ring oscillator eliminates the frequency drift due processing variances. The ring oscillator provided by the invention incurs substantially less frequency drift than a conventional ring oscillator, but the frequency of the ring oscillator is still dependent on temperature and voltage changes. The improved ring oscillator according to the invention is particularly suited for operating as a localized oscillator that is used to facilitate periodic refreshing of DRAM within a computer.

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San Jose, CA, United States of America

Wing Hong Chow