U.S. Philips Corporation

Winfried B Jansen

Wolfgang Nolde

Dieter J Janta

Manfred Biehl

Wolfdietrich G Kasperkovitz

Burkhard Dick

Ralf Pilaski

Norbert Wirges

Bernd Pille

Production of a frequency control signal in an FSK receiver

A description is given of a circuit arrangement comprising

Circuit arrangement with a filter quadripole

A phase comparison circuit includes a double balanced mixer stage which receives a sine signal as well as this sine signal in anti-phase and a square-wave switching signal of the same nominal frequency, two active current mirror circuits are used which incorporate at least two common negative feedback circuit elements, the first of which is operative in the input-sided negative feedback of the first current mirror circuit and in the output-sided negative feedback of the second current mirror circuit and the second of which is operative in the reverse way. The two current mirror circuits are alternately connected to the two balanced mixer stages by means of a switching stage during the half cycle clock of the switching signal.

Phase comparison circuit

The invention relates to the synchronization of a frequency-controllable oscillator in a PLL circuit with a carrier. The adjustment of this oscillator to the carrier frequency can be dispensed with in that additionally a frequency discriminator is provided which initially tunes the oscillator in accordance with the frequency difference. The frequency discriminator compares each oscillator frequency with a stable reference frequency which is proximate to the desired frequency and tunes the oscillator until it is in the range of the reference frequency. Subsequently the frequency discriminator is blocked and the further synchronization is taken over by the phase discriminator in the PLL circuit.

Circuit arrangement for synchronizing a frequency-controllable oscillator

An approximately sinusoidal signal is generated by superimposing a first signal, which has a half cycle duration and corresponds to a triangular signal which is suppressed during every second half cycle, on a second triangular signal, every second waveform of the superimposed signal thus obtained being inverted.

Method of generating an approximately sinusoidal signal and circuit

An FM receiver for demodulating an RF carrier signal containing a pilot frequency signal is provided. The receiver includes first and second frequency control loops. The first frequency control loop selects the local oscillator signal frequency. The reference signal oscillator in the first frequency control loop forms a part of a second frequency control loop. The second frequency control loop locks the phase of the reference signal oscillator with a detected pilot signal. In this way, the tuning signal of the local oscillator is kept phase locked to the detected pilot signal. Additional provisions are provided for changing the divisor of the second phase lock loop such that the time for establishing phase lock is reduced.

Receiver circuit comprising two phase control loops

The invention relates to a circuit for an FM-receiver having a very low intermediate frequency and a tuning frequency-independent amplitude of the LF output signal. The oscillator frequency is controlled in such a way by a reactance circuit that frequency swing reduction occurs. In addition, a reactance circuit is described by means of which a constant fine tuning slope can be obtained during the capacitive tuning of the oscillator circuit.

Oscillator control circuit in an F.M. receiver

A receiver for AM signals, in which the carrier is amplitude modulated with a first signal (L+R) and phase modulated with a second signal (L-R), includes a circuit for reducing distortion in the output signal due to amplitude overmodulation. This circuit includes an overmodulation detector for controlling a switch in a phase demodulation signal channel, which switch, coupled between a demodulator and an integrator in this signal channel, effectively short-circuits the input to the integrator causing the output thereof to remain constant for the duration of the overmodulation.

Receiver for AM stereo signals having a circuit for reducing distortion

In the circuit according to the invention the entire FM-demodulator output signal is evaluated, that is to say the sum of the low-frequency signal and the d.c. voltage (AFC) component. The absolute value is produced therefrom and an attenuator circuit becomes operative in the low-frequency channel when the absolute value of the demodulator output signal exceeds a predetermined threshold value. This not only enables the suppression of spurious receptions, but also the suppression of intermediate receptions (the reception of two transmitters on the filter edges) and surging of noise. The circuit can be easily implemented in integrated circuit technique.

Growing community of inventors

Ellerbek, Germany

Winfried B Jansen