Corning Incorporated

Windsor Pipes Thomas, Iii

Shawn Rachelle Markham

James Ernest Webb

John T Keech

Darwin Gene Enicks

Michael William Price

Aric Bruce Shorey

Archit Lal

Yi-An Chen

Robert Lee Smith, Iii

Yung-Jean Lu

Karthik Gopalakrishnan

A thin sheet () disposed on a carrier () via a surface modification layer () to form an article (), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers () having arrays () of vias () may be formed on the thin sheet, and devices () formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.

Carrier-bonding methods and articles for semiconductor and interposer processing

A flexible glass laminate structure includes a flexible glass substrate having a thickness of no more than 0.3 mm. The flexible glass laminate structure includes a flexible glass layer including the flexible glass substrate. A property control layer is laminated to the flexible glass layer. A neutral axis of the flexible glass laminate is located outside the flexible glass layer when the flexible glass layer is in a compressive bend configuration.

Flexible glass laminate structures for architectural design and other applications

A non-polished glass wafer, a thinning system, and a method for using the non-polished glass wafer to thin a semiconductor wafer are described herein. In one embodiment, the glass wafer has a body (e.g., circular body) including a non-polished first surface and a non-polished second surface substantially parallel to each other. In addition, the circular body has a wafer quality index which is equal to a total thickness variation in micrometers plus one-tenth of a warp in micrometers that is less than 6.0.

Non-polished glass wafer, thinning system and method for using the non-polished glass wafer to thin a semiconductor wafer

An assembly, such as for growing carbon nanotubes, includes a substrate including SiOand has a thickness of less than 500 &#x3bc;m. Further, the substrate is bendable and has a surface with non-flat or non-polished texture such that surface comprises raised and recessed features for receiving a coating, such as a catalyst. Carbon nanotubes may be anchored to and grow from the recessed features of the substrate.

Substrate such as for use with carbon nanotubes

A three-dimensional integrated circuit (3D-IC) which incorporates a glass interposer and a method for fabricating the three-dimensional integrated circuit (3D-IC) with the glass interposer are described herein. In one embodiment, the 3D-IC incorporates a glass interposer which has vias formed therein which are not filled with a conductor that allow for precision metal-to-metal interconnects (for example) between redistribution layers. In another embodiment, the 3D-IC incorporates a glass interposer which has vias and has a coefficient of thermal expansion (CTE) that is different than the CTE of silicon which is 3.2 ppm/&#xb0; C.

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Painted Post, NY, United States of America

Windsor Pipes Thomas, Iii