International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Wilson Earl Smith

Jerry Don Ackaret

James A O'Connor

Sumeet Kochar

Randolph Scot Kolvick

Robert M Dunn

Robert W Downes

Susan E Goodwin

Justin Potok Bandholz

Martin Joseph Crippen

James Edward Hughes

Jeffery Michael Franke

Joseph Edward Bolan

David John Jensen

Jeffery J Van Heuklon

John K Langgood

Kenneth T Wilson

Bay Van Nguyen

Derek Robertson

John M Sheplock

Brian E Bigelow

Christopher Lee Durham

Kevin M Cash

Jeffrey J Van Heuklon

Anna H Siskind

David L Cowell

Ronald E Suciu

Barry Eugene Jaked

Effects of a physical memory fault are mitigated. In one example, to facilitate mitigation, memory is allocated to processing entities of a computing environment, such as applications, operating systems, or virtual machines, in a manner that minimizes impact to the computing environment in the event of a memory failure. Allocation includes using memory structure information, including, information regarding fault containment zones, to allocate memory to the processing entities. By allocating memory based on fault containment zones, a fault only affects a minimum number of processing entities.

Physical memory fault mitigation in a computing environment

Managing faulty memory pages in a computing system, including: tracking, by a page management module, a number of errors associated with a memory page; determining, by the page management module, whether the number of errors associated with the memory page exceeds a predetermined threshold; responsive to determining that the number of errors associated with the memory page exceeds the predetermined threshold, attempting, by the page management module, to retire the memory page; determining, by the page management module, whether the memory page has been successfully retired; and responsive to determining that the memory page has not been successfully retired, generating, by the page management module, a predictive failure alert.

Managing faulty memory pages in a computing system

Operating computer memory in a computer including dynamically monitoring, by a predictive failure analysis ('PFA') module, correctable memory errors and memory temperature and managing cooling resources in the computer in dependence upon the correctable memory errors and memory temperature.

Operating computer memory

A method and circuit for implementing an enhanced availability personality card for a chassis computer system, and a design structure on which the subject circuit resides are provided. The personality card includes a first erasable programmable read only memory (EPROM) and a second EPROM, each EPROM storing Vital Product Data (VPD) and a first temperature sensor and a second temperature sensor sensing temperature. A primary bidirectional bus and a redundant bidirectional bus are respectively connected between the first EPROM and the first temperature sensor and the second EPROM and the second temperature sensor, and a pair of chassis management modules. Each chassis management module includes a switch connected to both the primary bidirectional bus and the redundant bidirectional bus providing redundant paths, enabling continued function with failure of any critical personality card component.

Implementing ultra high availability personality card

A system includes a data processing core coupled to a system memory employing error correction code (ECC) circuitry. The core includes an indicator of when a correctable system memory error occurs and what address is associated with the error. A watchdog timer is instantiated on a system management device. Periodically, the timer prompts the management device to interrupt the processor and poll the error indicator to determine if a memory error has been detected. If an error is detected, the corresponding physical memory address is recorded. If a predetermined number of consecutive errors associated with a single memory address or range of addresses occurs, an alert is issued. In one embodiment, polling the error indicator is infrequent initially. As additional errors are detected, the polling frequency increases. At higher polling frequencies, the system may require a greater number of consecutive errors before taking additional action.

Implementing memory failure analysis in a data processing system

A method for correcting error weights in a communication system in which at least one error condition can result from more than one cause. Stations on the system send error reports to an error monitor station which maintains a count of the number of stations reporting an error having multiple causes and periodically corrects the error weights assigned to each station as a function of the maximum number of errors reported by any station only when the number of stations reporting a multiple cause error exceeds a predetermined value.

Apparatus and method for isolating and predicting errors in a local area

Stations of a communications network maintain a set of counters which measure the frequency of occurrence of soft errors in said network. Periodically, each station generates and transmits an error report containing the error counts to a ring error monitor provided in one of the stations. The ring error monitor analyzes the report and calculates and stores weighted error counts for stations in an error domain. The stored error counts are integrated, over a selected time interval, and compared with a threshold value normal for a communications network, operating at acceptable error rate. The results of the comparison set error flags if the limits are exceeded indicating possible future station failures.

Growing community of inventors

Bahama, NC, United States of America

Wilson Earl Smith