Digital Equipment Corporation

William Watson

Richard Franklin Lary

David William Thiel

Barry L Rubinson

Robert E Willard

Verell Boaen

Catharine Van Ingen

Edward A Gardner

A dual addressing arrangement comprises a complex address pointer within entries of a communication queue used by a port driver and an port adapter when exchanging information in a host computer. The complex address pointer comprises a virtual address portion and a physical address portion. The port driver uses the virtual address portion to ascertain the location of entry structures, while the port adapter uses the physical address portion to locate the structures in a host memory. The arrangement and interpretation of the address portions of the complex pointers within an entry depend upon the direction of information flow, i.e., the passing of messages from the port driver to the port adapter using a driver-to adapter queue or the passing of responses from the adapter to the driver using an adapter-to-driver queue.

Dual addressing arrangement for a communications interface architecture

A communication interface between a port driver and an port adapter of a host computer includes a singly-linked queue resident in a host memory of the computer. The queue includes a header element and a stopper element with message entries linked therebetween. The message entries contain information to be exchanged between the port driver and port adapter. Each message entry includes at least a carrier that contains a forward link pointer to the next entry in the queue and message/response specific control information. The stopper element identifies the end of the queue and is distinguishable from a message entry by a valid indicator, e.g., the state of at least one bit of the forward link pointer. Functionally, the stopper entry allows the port driver and port adapter to concurrently insert and remove message entries of the singly-linked queue in a reliable manner without the use of any external synchronization mechanism.

Queue apparatus and mechanics for a communications interface architecture

A memory mapping system for use by a port adapter in a computer facilitates access to named data buffers in host memory. The system generally comprises a mechanism that enables the adapter to efficiently translate the data buffer name to physical address locations in host memory without knowledge of the memory management policies of the computer. Specifically, the system includes various data structures and pointers that allow the port adapter to view host memory in 'port pages' when accessing memory locations of a named data buffer. The data locations are virtually, but not physically, contiguous and the invention provides efficient identification of the physical addresses of the locations.

System for accessing information in a data processing system

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Redmond, WA, United States of America

William Watson