Xerox Corporation

Dpix, LLC

William W Yao

Ronald T Fulks

Richard L Weisfield

Jackson H Ho

Chuang-Chuang Tsai

Michael G Hack

Richard H Bruce

Russel A Martin

Louis D Silverstein

Alan G Lewis

William D Turner

Thomas G Fiske

Malcolm J Thompson

Tzu-Chin Chuang

Robert R Allen, Deceased

Hugo L Steemers

Chuang C Tsai

Quan Yuan

Susan M Stuber

Byung Park

An ESD protection system for an image sensor array includes a two-dimensional array of pixels formed on a substrate. Each of the pixels is connected to a gate line and a data line. The system includes a common ESD bus and at least one ESD protection circuit formed on the substrate. The protection circuit includes: a pair of thin film transistors connected in a back-to-back configuration with a first terminal connected to one of the gate lines, and a second terminal connected to the common ESD bus. Upon the occurrence of an electrostatic discharge onto the gate line causing the voltage across the terminals to exceed a threshold value, the protection circuit discharges the ESD charge from the gate line to the ESD bus, thereby preventing damage to each of the switching transistors in the pixels connected to the gate line.

On-substrate ESD protection for array based image sensors

Photodetecting devices or arrays and methods of making such devices or arrays. In one exemplary embodiment, a photodetecting array includes a plurality of detecting cells arranged in an array, each of the detecting cells including a photodiode, a plurality of data lines coupled to the detecting cells, and a mesh of bias voltage lines which comprise first bias lines disposed substantially parallel to gate lines which are coupled to the detecting cells and second bias lines disposed substantially perpendicularly to the gate lines, wherein the total length of the first bias lines exceeds a total length of the second bias lines.

Photodetecting sensor array

A sensor device includes a sensing element and a thin film transistor (TFT), and the TFT's channel leads include semiconductor channel leads formed in a layer of microcrystalline silicon (.mu.c-Si). The sensing element is formed in a semiconductor layer that includes silicon-based material and is over the .mu.c-Si layer. Each of the semiconductor channel leads has a structure that prevents formation of bubbles at the lower and upper sides of the .mu.c-Si layer during production of the sensing element. The TFT's channel can be formed in a layer of intrinsic silicon-based material under the .mu.c-Si layer and the .mu.c-Si layer can be a deposited doped layer; or the TFT's channel can be formed in an intrinsic .mu.c-Si layer in which the leads are formed by implanting a dopant. The .mu.c-Si layer can include a sufficiently small amount of hydrogen to prevent formation of bubbles; it can include crystalline grain structures permitting hydrogen to dissipate at a sufficient rate to prevent formation of bubbles; or it can have interfaces sufficiently stable to prevent formation of bubbles.

Sensor with doped microcrystalline silicon channel leads with bubble

The present invention is a novel pixel structure, and method for making the same, that reduces wasteful voltage drop associated with other pixel structures that cover their pixel elements with a final passivation layer. The presently claimed pixel structure is a combination of a thin film transistor (TFT), an associated pixel element, and a passivation layer. The TFT is first deposited atop a suitable substrate and patterned. Then, the passivation layer is deposited on top of the thin film transistor. Contact cuts are made into the passivation layer where the pixel element is to contact the TFT. Finally, the pixel element is deposited--lying atop the passivation layer and contacting with the underlying TFT where the contact cuts were made in the passivation layer.

Electrically isolated pixel element in a low voltage activated active

In producing a sensor device with a sensing element and a thin film transistor, a semiconductor layer with microcrystalline silicon (.mu.c-Si) is produced in which semiconductor channel leads are formed. The .mu.c-Si has a structure that prevents formation of bubbles at the sides of the semiconductor layer during subsequent production of a sensing element in a silicon-based layer. The semiconductor layer can be a deposited doped layer of .mu.c-Si, or a layer of intrinsic .mu.c-Si can be doped. The .mu.c-Si layer can be deposited with a sufficiently small amount of hydrogen to prevent formation of bubbles; it can be deposited with crystalline grain structures permitting hydrogen to dissipate at a sufficient rate to prevent formation of bubbles; or its interfaces can be formed with sufficiently stability to prevent formation of bubbles.

Producing a sensor with doped microcrystalline silicon channel leads

The invention provides an integrated dark matrix for an active matrix liquid crystal display. A plurality of pixel electrodes overlap at least one of a plurality of gate lines and a plurality of data lines. A perimeter of the pixel electrodes overlaps the gate lines and/or data lines by twice the distance that the pixel electrode is above the gate and data lines, respectively to obtain a viewing angle of over 60 degrees.

Integrated dark matrix for an active matrix liquid crystal display with

The invention provides a method for manufacturing an active matrix liquid crystal displaying device having a plurality of thin film transistors using five masks. A plurality of gate electrodes are formed using a first mask. A plurality of etch stoppers are formed over the gate electrodes using a second mask. A plurality of chain electrodes and a plurality of source electrodes are formed using a third mask. A passivation layer including via holes is formed using a fourth mask. A plurality of pixel electrodes are formed using a fifth mask.

Method of manufacturing active matrix LCD using five masks

A thin-film structure on an insulating substrate includes an array of binary control units with an area of at least 90 cm.sup.2 and a density of at least 60 binary control units per cm. One implementation has an area of approximately 510 cm.sup.2, a diagonal of approximately 33 cm, and a total of approximately 6.3 million binary control units. Each binary control unit has a lead for receiving a unit drive signal, to which it responds by causing presentation of a segment of images presented by the array. Each binary control unit can present a segment with either a first color having a maximum intensity or a second color having a minimum intensity. Each binary control unit's unit drive signal causes the binary control unit to present its first and second colors. The substrate can be glass. Each binary control unit can include an amorphous silicon thin-film transistor (TFT) and a storage capacitor. Each binary control unit can be square. The thin-film structure can be used in an active matrix liquid crystal display (AMLCD), monochrome or, with an appropriate filter, color.

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Los Altos, CA, United States of America

William W Yao