Lsi Corporation

Lsi Logic Corporation

Avago Technologies General IP (singapore) Pte. Ltd.

William W Voorhees

David T Uddenberg

Mark Slutz

William K Petty

William J Schmitz

Timothy E Hoglund

Eugene Saghi

Stephen B Johnson

Patrick R Bashford

Ramprasad Raghavan

George Oliver Penokie

Harvey J Newman

Srikiran Dravida

Jason Williams

Structure is disclosed for a non-blocking SAS architecture utilizing virtual connections between SAS devices. One embodiment comprises a SAS expander. The SAS expander comprises a plurality of physical links (PHYs) and a Virtual Connection Manager (VCM) coupled with the plurality of PHYs. The VCM exchanges information over a plurality of concurrently established virtual pathways between a first PHY of the plurality of PHYs and a second PHY of the plurality of PHYs.

Structure for non-blocking serial attached SCSI infrastructure utilizing virtual pathways

Systems and methods presented herein provide for tunneling PCIe data through a SAS domain. a data system includes a SAS expander, a PCIe target device coupled to the expander, and a SAS controller communicatively coupled to a host system and the expander. The controller is operable to open a connection with the expander via the SAS protocol, and to transport packet data between the target device and the host system through the connection via the PCIe protocol. For example, the controller and the expander may be operable to buffer packets of data in the connection. The controller may issue a number of the data packets to be transferred in the connection. Then, the issued number of data packets are transported between the target device and the host system through the connection via the PCIe protocol.

PCIe tunneling through SAS

Methods and structure for determining compatibility between a pair of SAS devices for support of super-standard features of the devices. Features and aspects hereof provide for exchange of information between a first and second SAS device using SAS protocol in non-standard manners. The exchanges are designed to exchange information between compatible, enhanced device without causing protocol violation errors in either the first or second devices. The information exchanged represents super-standard features supported by each device. Mutually supported super-standard features are enabled for further communications between the devices. If no super-standard features are mutually supported or if the second device is non-enhanced, no super-standard features are enabled in further communications between the devices.

Methods and structure for identifying support for super-standard features in communications between serial attached SCSI devices

Systems and methods presented herein provide for coupling a storage controller to a plurality of different storage device types. One embodiment of the storage controller includes an interface operable to communicatively couple to a storage device. The storage controller also includes a processor operable to select between hardware protocol detection of the storage device and firmware protocol detection of the storage device, and to detect a protocol of the storage device when the storage device communicatively couples to the interface according to the selected protocol detection. The storage controller then selects a protocol to process input/output requests from a host based on the detected protocol of the storage device.

Multi-protocol storage controller

The present invention is directed to a method which allows for substitution of standard SAS ALIGN primitives with an alternative, more spectrally pure set of SAS ALIGN primitives that allows for enhanced continuous adaptation performance. Two consenting SAS devices which are connected to each other may negotiate for and start communicating using the alternate set of ALIGN primitives, which may allow for improved jitter tolerance and reduced bit error rate.

Application of alternate align primitives during SAS rate matching to improve continuous adaptation

Systems and methods are provided for automatically configuring ports of devices within an SAS network domain. A domain control element, such as an SAS initiator, is coupled to a plurality of expander devices. The domain control element configures ports of the expander devices by traversing port connections between the expander devices to determine routing attributes of the ports. The domain control element automatically configures the ports to operate according to the routing attributes. In one aspect hereof, an initiator device of the SAS network domain serves as a control element to perform the automated configuration of routing attributes. In another aspect hereof, an expander device serves as a control element to configure routing attributes of the ports.

Systems and methods for configuring ports of an SAS domain

The present invention provides a device and method for mitigating performance degradation caused by SATA drives attached to a SAS domain. In one of the embodiments of the present invention, a SATA degradation mitigation device ('SDMD') is installed between a SAS domain and one or more SATA drives. The SDMD effectively reduces congestion on intermediate links by buffering SATA data and transmitting the data at a rate which is higher than the rate at which the SATA data is received from a drive. Conversely, write data from the SAS domain may be buffered at the SDMD at a higher rate and subsequently sent to the SATA drive at a lower rate. This SATA data buffering and subsequent increase in data rate improves the overall efficiency of a SAS domain storage system by reducing data congestion arising out of low-performance SATA drives clogging the intermediate links.

Mitigating performance degradation caused by a sata drive attached to a sas domain

Methods and associated structure for utilizing multiple ports or PHYs comprising a SAS wide port to improve transmission bandwidth utilization for a single large I/O request. In one aspect hereof, a large I/O request is broken into a plurality of smaller I/O requests to be distributed over multiple PHYs or ports of a configured wide SAS port. The number of smaller I/O requests may be any number up to the maximum number of PHYs or ports comprising the SAS wide port. In another aspect hereof, the size of a large I/O request may be compared against a threshold value to determine whether the large request should be broken into smaller requests. The threshold value may be determined in accordance with features and aspects hereof either statically or dynamically based on workloads assigned to, and utilization of, the configured SAS wide port.

Methods and structure for improved transfer rate performance in a SAS wide port environment

Improved methods and structures for testing of SAS components, in situ, in a SAS domain. A first SAS component is adapted to generate stimuli such as error conditions to elicit a response to the error condition from a second SAS component coupled to the first in the intended SAS domain configuration. In one aspect, a SAS device controller generates stimuli applied to a SAS expander coupled thereto and verifies proper response from the SAS expander. In another aspect, a SAS expander generates stimuli applied to a SAS device controller coupled thereto and verifies proper response from the SAS device controller. Stimuli may be generated by custom circuits or firmware/software within the first component. Vendor specific SAS SMP transactions may be used to cause the first component to enter the special verification mode.

Methods and structure for testing responses from SAS device controllers or expanders

Systems and methods for analyzing data passing between an SAS/SATA device and a plurality of other devices are presented. A system includes a plurality of physical interfaces configured for passing data between the SAS/SATA device and the other devices. The system also includes a test interface, or test PHY, configured for coupling to the physical interfaces for analysis of the data passing through those physical interfaces. The test PHY may be integrally configured with the SAS/SATA device and may substantially minimize alteration of characteristic impedance caused by external analysis of the data. The system may also include a multiplexer for selectively coupling the PHYs to the test PHY.

Systems and methods for analyzing data of a SAS/SATA device

A system and method for testing the signals on a parallel communication bus uses a single printed circuit board that connects to the bus. The signals from the bus may be passively and actively filtered prior to a multiplexer. The multiplexer may be controlled by a variety of inputs, including communications over a second bus by a remote device. The output of the multiplexer is one or more probe points that may be connected to a measurement device.

Parallel bus debugging tool

Systems and methods for analyzing data transferred through an SPI data bus are presented. In one exemplary preferred embodiment of the invention, an SPI data probe imitates an SPI device coupled to the SPI data bus and receives data from the SPI data bus so that the data may be analyzed. The SPI data probe transfers the data to an analysis unit without substantially altering impedance more than the SPI device would. The SPI data probe includes connectors configured for coupling the probe to the SPI data bus and for coupling the probe to an analysis unit. The SPI data probe also includes circuitry that may buffer, compensate and deskew the data as an SPI device would.

Growing community of inventors

Colorado Springs, CO, United States of America

William W Voorhees