Seeq Technology, Incorporated

William W Ip

Gust Perlegos

Individual CMOS floating-gate memory cells capable of storing data are arranged in an array structure and selected with horizontal and vertical access lines. Current flow through the array cells is measured, amplified, and then compared with an unprogrammed cell using the sense amplifier of the present invention. The sense amplifier tolerates increased variation in the characteristics of programmed or unprogrammed cells and therefore increases the manufacturing yields of the arrays. It additionally achieves fast accessing and sensing of the stored data.

CMOS eprom sense amplifier

A semiconductor memory circuit having primary and redundant arrays with the capability of substituting the redundant arrays for defective primary arrays by address location.

Growing community of inventors

San Jose, CA, United States of America

William W Ip