International Business Machines Corporation

William Todd Boyd

Renato John Recio

Madeline Vega

William Gavin Holland

Steven Wade Hunter

Steven Mark Thurber

Douglas Morgan Freimuth

John Lewis Hufferd

Agustin Mena, Iii

Douglas James Joseph

Thomas James Heller, Jr

Jean Louis Calvignac

Chih-Jen Chang

Michael Anthony Ko

Donald G Grice

John Lewars

Georgy A Chochia

Stanley Everett Schuster

Richard Edward Matick

Thomas J Dewkett

Michael Ignatowski

Douglas M Fremiuth

Steven W Thurber

Thomas Heller Jr

As disclosed herein, a method, executed by a computer, for analyzing a performance metric includes distributing link connection information for a network to each node in the network, pairing each node with another node in the network to provide paired nodes, testing a performance metric for the paired nodes, and generating a performance report for the network. The method may further include receiving link connection information for the network. The method may further include constructing a connectivity graph based on the received link connection information. The method can be used to test link performance within non-homogeneous networks. A computer system product and a computer program product corresponding to the method are also disclosed herein.

Network performance testing in non-homogeneous networks

As disclosed herein, a method, executed by a computer, for analyzing a performance metric includes distributing link connection information for a network to each node in the network, pairing each node with another node in the network to provide paired nodes, testing a performance metric for the paired nodes, and generating a performance report for the network. The method may further include receiving link connection information for the network. The method may further include constructing a connectivity graph based on the received link connection information. The method can be used to test link performance within non-homogeneous networks.

Embodiments relate to providing high throughput hardware acceleration. Aspects include initializing an accelerator control queue (ACQ) configured to provide location information on a plurality of pages of data identified as accelerator data. An originating location of each page of requested target data is determined. The originating location includes one of system memory and disk storage. Based on determining that the originating location is system memory, an entry is created in the ACQ mapping to a system memory source address for the target data. Based on determining that the originating location is disk storage, an entry is created in the ACQ mapping to a special pre-stage buffer source address of a special pre-stage buffer for the target data. Each page of the plurality of pages of target data is accessed by the accelerator from respective locations in said memory or said special pre-stage buffer, based on respective entries of the ACQ.

High throughput hardware acceleration using pre-staging buffers

A computer program product for initiating a task in a computer system including executing a method that includes receiving a task and a status of the task relative to a target service level. A current power state of the processor is determined. Execution of the task is initiated on the processor in response to the status indicating that the task is meeting the target service level and to the current power state being a low power state. It is determined if the processor can be moved into a high power state, the determining performed if the task is not meeting the target service level and the current power state is the low power state. If the processor can be moved into the high power state then the processor is moved into the high power state and execution of the task is initiated on the processor.

Allocating computing system power levels responsive to service level agreements

Power management in a multi-processor computer system, including a computer program product for facilitating receiving a task for execution in a high power state, and determining a current power state of a processor in a multi-processor system, the system having a specified power limit. The task is dispatched to the processor if the current power state of the processor is the high power state. If the processor is not in the high power state, then it is determined if moving the processor into the high power state will cause the multi-processor system to exceed the specified power limit. The processor is moved into the high power state in response to determining that moving the processor into the high power state will not cause the multi-processor system to exceed the specified power limit. The task is dispatched to the processor in response to moving the processor into the high power state.

Power management in a multi-processor computer system

A computer-implemented method, apparatus, and computer usable program code are disclosed for migrating a virtual adapter from a source physical adapter to a destination physical adapter in a data processing system where multiple host computer systems share multiple adapters and communicate with those adapters through a PCI switched-fabric bus. The virtual adapter is first caused to stop processing transactions. All in-flight transactions that are associated with the virtual adapter are then captured. The configuration information that defines the virtual adapter is moved from the source physical adapter to the destination physical adapter. The in-flight transactions are then restored to their original locations on the destination virtual adapter. The virtual adapter is then restarted on the destination physical adapter such that the virtual adapter begins processing transactions.

Method, apparatus, and computer usable program code for migrating virtual adapters from source physical adapters to destination physical adapters

A method, mechanism and computer usable medium is provided for distributing I/O fabric errors to the appropriate root nodes in a multi-root environment. The case where the I/O fabric is attached to more than one root node and where each root can potentially share with the other roots the I/O adapter (IOA) resources which are attached to the I/O is addressed. Additionally, a method, mechanism and computer usable medium is provided by which errors detected in an I/O fabric may be routed to all root nodes which may be affected by the error, while not being reported to the root nodes that will not be affected by those errors. In particular, distributed computing system which uses the PCI Express protocol to communicate over the I/O fabric is addressed.

Broadcast of shared I/O fabric error messages in a multi-host environment to all affected root nodes

A mechanism for offloading the management of receive queues in a split (e.g. split socket, split iSCSI, split DAFS) stack environment, including efficient queue flow control and TCP/IP retransmission support. An Upper Layer Protocol (ULP) creates receive work queues and completion queues that are utilized by an Internet Protocol Suite Offload Engine (IPSOE) and the ULP to transfer information and carry out send operations. As consumers initiate receive operations, receive work queue entries (RWQEs) are created by the ULP and written to the receive work queue (RWQ). The ISPOE is notified of a new entry to the RWQ and it subsequently reads this entry that contains pointers to the data that is to be received. After the data is received, the IPSOE creates a completion queue entry (CQE) that is written into the completion queue (CQ). After the CQE is written, the ULP subsequently processes the entry and removes it from the CQE, freeing up a space in both the RWQ and CQ. The number of entries available in the RWQ are monitored by the ULP so that it does not overwrite any valid entries. Likewise, the IPSOE monitors the number of entries available in the CQ, so as not overwrite the CQ.

Receive queue device with efficient queue flow control, segment placement and virtualization mechanisms

Routing between multiple hosts and adapters in a PCI environment is provided by a method and system. A Destination Identification (DID) field is inserted in a field of the PCI bus address (PBA) of transaction packets dispatched through PCI switches. A particular DID is associated with a particular host or system image, and thus identifies the physical or virtual end point of the packets. The method and system may track connections such that when particular host of a root node becomes connected to a specified switch, a PCI Configuration Master (PCM), residing in one of the root nodes, is operated to enter a destination identifier or DID into a table. The DID is then inserted in the PBA of packets directed through the specified switch from the particular host to one of the adapters.

Creation and management of routing table for PCI bus address based routing with integrated DID

A method and apparatus is provided for routing error messages in a distributed computer system comprising multiple root nodes, and further comprising one or more PCI switches and one or more I/O adapters, wherein each root node includes one or more system images. In one useful embodiment, a method is provided for routing I/O error messages to root nodes respectively associated with the errors contained in the messages. The method includes detecting occurrence of an error at a specified one of the adapters, wherein the error affects one of the system images, and generating an error message at the specified adapter. The method further comprises routing the error message from the specified adapter to the particular root node that includes the affected system image. The error message is then selectively processed at the particular root node, in order to identify the affected system image. Usefully, the step of routing the error message includes using a bus/device/function number associated with the error, together with a routing table located in one of the PCI switches, to route the error message to the correct root node and system image.

Method of routing I/O adapter error messages in a multi-host environment

The present invention provides mechanisms that enable application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from the local operating system or hypervisor. In one aspect of the present invention, a mechanism is provided for handling user space creation and deletion operations for creating and deleting allocations of linear block addresses of a physical storage device to application instances. For creation, it is determined if there are sufficient available resources for creation of the allocation. For deletion, it is determined if there are any I/O transactions active on the allocation before performing the deletion. Allocation may be performed only if there are sufficient available resources and deletion may be performed only if there are no active I/O transactions on the allocation being deleted.

Mechanisms for creation/deletion of linear block address table entries for direct I/O

A computer-implemented method, apparatus, and computer program product are disclosed in a data processing environment that includes host computer systems that are coupled to adapters utilizing a switched fabric for routing packets between the host computer systems and the adapters. A unique destination identifier is assigned to one of the host computer systems. A portion of a standard format packet destination address is selected. Within a particular packet, the portion is set equal to the unique identifier that is assigned to the host computer system. The particular packet is then routed through the fabric to the host computer system using the unique destination identifier.

Method, apparatus, and computer program product for routing packets utilizing a unique identifier, included within a standard address, that identifies the destination host computer system

A mechanism for offloading the management of send queues in a split socket stack environment, including efficient split socket queue flow control and TCP/IP retransmission support. An Upper Layer Protocol (ULP) creates send work queue entries (SWQEs) for writing to the send work queue (SWQ). The Internet Protocol Suite Offload Engine (IPSOE) is notified of a new entry to the SWQ and it subsequently reads this entry that contains pointers to the data that is to be transmitted. After the data is transmitted and acknowledgments are received, the IPSOE creates a completion queue entry (CQE) that is written into the completion queue (CQ). The flow control between the ULP and the IPSOE is credit based. The passing of CQ credits is the only explicit mechanism required to manage flow control of both the SWQ and the CQ between the ULP and the IPSOE.

Split socket send queue apparatus and method with efficient queue flow control, retransmission and sack support mechanisms

A computer-implemented method, apparatus, and computer program product are disclosed for routing error messages in a multiple host computer system environment to only those host computer systems that are affected by the error. The environment includes multiple host computer systems that share multiple devices utilizing a switched fabric. An error is detected in one of the devices. Routing tables that are stored in fabric devices in the fabric are used to identify ones of the host computer systems that are affected by the error. An error message that identifies the error is routed to only the identified ones of the host computer systems.

Routing of shared I/O fabric error messages in a multi-host environment to a master control root node

A mechanism is provided that enables user space middleware or applications to pass file name based storage requests directly to a physical I/O Adapter without run-time involvement from the local Operating System (OS). A mechanism is provided for using a file protection table (FPT) data structure, which may include a file name protection table (FNPT) and file extension protection table (FEPT), to control user space and out of user space Input/Output (I/O) operations. In addition, a mechanism is provided for managing the FPT based on user space operations to create, query, modify and delete entries in the FPT.

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Poughkeepsie, NY, United States of America

William Todd Boyd