Intel Corporation

William T Reaves

Lance W Dover

Robert N Hasbun

Paul D Ruby

A method wherein a special programming mode of a memory is entered. The special programming mode disables internal verification by the memory. The memory includes automation circuitry for program verification. A plurality of words is programmed into the memory without the memory performing internal program verification. A host processor verifies external to the memory the programming of the plurality of data words into the memory. The special programming mode is exited and internal program verification by the memory is enabled. An apparatus is also described having a host processor and a memory with special programming mode circuitry.

Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory

A method wherein a special programming mode of a memory is entered. The special programming mode disables internal verification by the memory. The memory includes automation circuitry for program verification. A plurality of words is programmed into the memory without the memory performing internal program verification. Hashing is performed with respect to the plurality of data words to generate a first hash value. The host processor compares the first hash value with a second hash value to see whether the first and second hash values are the same or different. The special programming mode is exited and internal program verification by the memory is enabled. An apparatus is also described having a host processor and a memory with special programming mode circuitry.

Growing community of inventors

Sacramento, CA, United States of America

William T Reaves