Texas Instruments Corporation

Other

William Robert Morrison

Kyle P Hunt

Simon Joshua Jacobs

Murali Hanabe

Ganapathy Sivakumar

Mark Christopher Fisher

Thomas Dyer Bonifield

Stephen P Adams

Asad Mahmood Haider

Bradley Morgan Haskett

Jane Qian Liu

Earl Vedere Atnip

Brian L Vialpando

Asadd M Hosein

Neel A Bhatt

Thomas W Winter

Richard Chen

Gregory D Winterton

An example method of producing a microelectromechanical system (MEMS) package, the method comprising: applying first epoxy layers to a first substrate, at least one of the first epoxy layers coupled to a second substrate; applying a first post gel heat treatment to the first epoxy layers; after applying the first post gel heat treatment to the first epoxy layers, applying second epoxy layers to the second substrate and to the first epoxy layers; and applying a second post gel heat treatment to the first epoxy layers and the second epoxy layers.

Methods and apparatus for electronic device packaging

An example includes: a substrate having a first package surface, having a second package surface opposite the first package surface, and having a die cavity with a depth extending into the first package surface; a semiconductor die having bond pads on a first die surface and having a second die surface opposite the first die surface, the semiconductor die having a die thickness, the second die surface of the semiconductor die mounted in the die cavity; a cover over a portion of the first die surface; conductors coupling the bond pads of the semiconductor die to bond fingers on the first package surface of the substrate; and dielectric material over the conductors, the bond fingers, the bond pads, at least a portion of the first semiconductor die and at least a portion of the cover, wherein the dielectric material extends above the first package surface of the substrate.

Semiconductor device package with die cavity substrate

A device has a microelectromechanical system (MEMS) component with at least one surface and a coating disposed on at least a portion of the surface. The coating has a compound of the formula M(CnF2n+1Or), wherein M is a polar head group and wherein n&#x2267;2r. The value of n may range from 2 to about 20, and the value of r may range from 1 to about 10. The value of n plus r may range from 3 to about 30, and a ratio of n:r may have a value of about 2:1 to about 20:1.

Coatings for relatively movable surfaces

A device has a microelectromechanical system (MEMS) component with at least one surface and a coating disposed on at least a portion of the surface. The coating has a compound of the formula M(CFO), wherein M is a polar head group and wherein n&#x2267;2r. The value of n may range from 2 to about 20, and the value of r may range from 1 to about 10. The value of n plus r may range from 3 to about 30, and a ratio of n:r may have a value of about 2:1 to about 20:1.

In accordance with the teachings of one embodiment of this disclosure, a method for manufacturing a semiconductor device includes forming a support structure outwardly from a substrate. The support structure has a first thickness and a first outer sidewall surface that is not parallel with the substrate. The first outer sidewall surface has a first minimum refractive index. A first anti-reflective layer is formed outwardly from the support structure and outwardly from the substrate. A second anti-reflective layer is formed outwardly from the first anti-reflective layer. The first and second anti-reflective layers each includes respective compounds of at least two elements selected from the group consisting of: silicon; nitrogen; and oxygen.

Manufacturing optical MEMS with thin-film anti-reflective layers

A TSV-MEMS packaging process is provided. The process includes forming TSVs in the front side of the product wafer, and attaching a first carrier to the front side of the product wafer, subsequent to forming TSVs. The process further includes thinning the back side of the product wafer to expose TSV tips, detaching the first carrier from the front side of the product wafer, and transferring the thinned wafer to a second carrier with back side adhered to the second wafer carrier. Semiconductor components are added to the front side of the product wafer, followed by forming a hermetic cavity over the added semiconductor components, and detaching the second carrier from the back side of the product wafer. Wafer level processing continues after detaching the second carrier.

Double wafer carrier process for creating integrated circuit die with through-silicon vias and micro-electro-mechanical systems protected by a hermetic cavity created at the wafer level

The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features () over a substrate (), and then forming a layer of material () over the semiconductor features (). This method further includes selectively etching portions of the layer of material () based upon a density or size of the semiconductor features () located thereunder, and then polishing remaining portions of the layer of material ().

Method for selectively etching portions of a layer of material based upon a density or size of semiconductor features located thereunder

Set of brushes with attachable base

A method for effecting a finishing operation on a semiconductor workpiece situated in a finishing apparatus that includes a finishing tool configured for pressingly engaging the workpiece with a pressing force for abradingly removing material from the workpiece includes the steps of: (a) situating the finishing tool to operate against the workpiece; (b) operating the finishing tool with a pressing force to effect the abrading removal; (c) measuring at least one parameter associated with the finishing operation to determine at least one parametric value for the at least one parameter; (d) modulating the pressing force according to a predetermined relationship between the pressing force and the at least one parametric value; and (e) repeating steps (c) and (d) until the finishing operation is complete.

Method for effecting a finishing operation on a semiconductor workpiece

A chemical mechanical polishing method using a modified slurry. A modified slurry is used with high platen rotational speed and high wafer carrier rotation speeds. The endpoint of the polishing process is determined by monitoring the electrical current of the wafer carrier motor.

Method for chemical mechanical polishing using a high selective slurry

An improved slurry for polish removal. One application of this slurry is for shallow trench isolation processing in semiconductor manufacturing. The improved slurry has an enhanced oxide to nitride polish removal selectivity. A modified slurry is formed by mixing a polishing slurry with tetramethyl ammonium hydroxide and hydrogen peroxide. In an alternative embodiment, the modified slurry is formed by mixing a salt of tetramethyl ammonium with a base and with hydrogen peroxide to form the modified slurry. The improved slurry when used during the chemical mechanical polishing (CMP) step of an integrated shallow trench isolation manufacturing process allows the reverse pattern, etch and clean steps to be eliminated prior to CMP.

High selectivity oxide to nitride slurry

Coker water from a delayed coking process is cooled and a water soluble, organic cationic surface active compound is introduced to produce a substantially water free oil stream and a substantially oil free coker water stream which can be returned to the coking process.

Growing community of inventors

Dallas, TX, United States of America

William Robert Morrison