Harris Corporation

Intersil Corporation

Intersil Americas Inc.

Other

Conexant Systems, Inc.

Globespan Virata Corporation

Conexant, Inc.

William R Young

Anthony L Rivoli

David Bruce Chester

Rex Everett Lowther

Charles W Longway

Patrick Anthony Begley

Gregg D Croft

William F Johnstone

Stephen J Gaul

Matthew M Salatino

Jose Avelino Delgado

Kenneth A Ports

David H Damerow

William W Wiles, Jr

Paul Cohen

John T Gasner

Donald Frank Hemmenway

William Brandes Shearon

Stuart W Pullen

Christopher W Malinowski

Perry W Frogge

Stanley R Zepp

Harold D Davidson

David S Landeta

Brian E Williams

Cindy C Manion

Michael C Hoke

Denis W Faas

James G Fox

David H Damarow

W Dale Edwards

Paul B Cohen

Leon F Parisoe

The present invention relates to integrated circuits having symmetric inducting devices with a ground shield. In one embodiment, a symmetric inducting device for an integrated circuit comprises a substrate, a main metal layer and a shield. The substrate has a working surface. The main metal layer has at least one pair of current path regions. Each of the current path region pairs is formed in generally a regular polygonal shape that is generally symmetric about a plane of symmetry that is perpendicular to the working surface of the substrate. The shield is patterned into segments that are generally symmetric about the plane of symmetry. Medial portions of at least some segments of the shield are formed generally perpendicular to the plane of symmetry as the medial portions cross the plane of symmetry.

Symmetric inducting device for an integrated circuit having a ground shield

An electrostatic discharge protection circuit for an integrated circuit that reduces unwanted transient currents during normal operations. In one embodiment, the electrostatic discharge protection circuit includes one or more electrostatic bus lines, a plurality of signal bonding pads and charge pumps. The one or more electrostatic bus lines are used to direct electrostatic discharge around internal circuitry. The plurality of signal bonding pads are used to receive external voltage signals. Each signal bonding pad is coupled to an associated electrostatic bus line via an unidirectional conducting device. A charge pump is used on each electrostatic bus line to precharge its associated electrostatic bus line to an associated predetermined voltage level. The precharging of each electrostatic bus line to its predetermined voltage level reduces transient currents through the unidirectional conducting devices when external voltage signals having voltage levels beyond normal supply voltage ranges are applied to the signal bonding pads.

ESD protection network utilizing precharge bus lines

A reference current/voltage gnereator is insensitive to variations in power supply voltage and temperature. The operational parameters of matched current mirror transistors of the generator are effectively equalized by an auxiliary bias amplifier, whose transistors are matched with and connected to the current mirror transistors of the generator in such a manner as to maintain the same electrical parameters in each of the current mirror legs of the current generator, irrespective of variations in supply voltage. Temperature insensitivity is achieved by making the output current mirror a current that is the sum of two currents whose current paths complementary temperature coefficients.

Reference current/voltage generator having reduced sensitivity to variations in power supply voltage and temperature

Integrated circuit air bridge structures and methods of fabricating same

In one embodiment a substrate,is patterned to have high and low conductive areas,respectively. Metal lines,in dielectric layer,pass transversely over the areas,The areas,interrupt parasitic inductive current induced in the substrate

Parasitic current barriers

Conductive elements which provide interconnections (air bridges between circuits) and components such as capacitors and inductors may be incorporated in the devices in a manner to reduce parasitic effects in the operation of the devices while providing close spacing which enhances the performance of the devices at high frequency. Separate substrates are provided respectively having the integrated circuits formed therein and covering, preferably sealing the integrated circuits. The air bridge conductive components (interconnections, capacitors or inductors) are formed separately in the covering substrate which is assembled with the substrate having the integrated circuit as a lid which seals and packages the circuits and the conductive element or component contained in the lid. The conductive component may be separated by cavities formed in the lid substrate or in the substrate having the integrated circuit device already formed therein. Assembly may take place at temperatures lower than necessary for fusion bonding and diffusion commonly used in the fabrication of integrated circuits. Bonds which are used may be metal, oxide or plastic (polymer) bonding material.

Load-monitoring feedback is used to maintain the slew rate of a line driver circuit at a prescribed rate that is independent of the effective load of the line being driven. This load-monitoring feedback control makes it possible to drive the line with an amplified output signal that faithfully tracks the input signal and conforms with prescribed slew rate and rise/fall time specifications, irrespective of characteristics of the signal line, which may vary over a specified range of component values. In a first embodiment, slew rate control is effected by increasing or decreasing the amount of charge on a reference capacitor and thereby the drive current to an output driver FET, in accordance with the change in state of the output of an output terminal-monitoring voltage threshold comparator relative to termination of a prescribed (one-shot established) time window. In a second embodiment, slew rate control is effected by directly determining the length of time required for the output terminal to transition between first and second states, and adjusting the operation of the output driver FET based on whether the total time measurement is equal to, greater than or less than the slew rate window.

Driver circuit having load-independent slew rate

Semiconductor devices 340 are formed in semiconductor wafer 300. Contact pads 332 are formed in each die 330. An interconnect connects the contact pads 332 to die surface contact regions 210, 212. Scribe trenches 348 are formed in device wafer 300; corresponding trenches 358 are formed in cover wafer 360. The cover wafer 360 is thinned to open scribe trenches 348. Conductive vias 310-313 connect the contact pads 210, 212 to external surface bump contacts 333.

Semiconductor packaging method

A constant slew rate amplifier has a precision internal slew rate control reference, that generates respective positive-going and negative-going voltages, associated with corresponding excursions in the input signal. These slew rate-defining voltages are decoupled from the line, making it possible to drive the line with an amplified output signal that faithfully follows the input signal and conforms with prescribed slew rate and rise/fall time specifications, irrespective of the capacitance of the line. In addition, the constant slew rate amplifier of the present invention is configured to minimize power dissipation during non-transitional signal conditions, while providing substantial current to rapidly drive the line from one state to another in accordance with the input signal.

Constant slew rate amplifier

Semiconductor-on-glass integrated circuits may include photodetectors which are stimulated by backside light passing through the glass substrate; this provides information reception by optical communication. Bipolar and field effect transistors are shielded from the light by their buried layers. Further, LEDs integrated together with photodetectors permits all optical communication among glass substrate chips. Alternative uses of glass substrate include thermal isolation for efficient thermally regulated integrated circuits.

Silicon-glass bonded wafers

A Schmitt trigger-configured overvoltage protection circuit has a hysteresis turn-on, turn-off characteristic that minimizes its sensitivity to noise, and is effective to protect an integrated circuit against a DC overvoltage condition, and electrostatic discharge-based transients, while allowing `hot` insertion of a device containing the clamping circuit into an already powered-up system. The protection circuit employs a reference device, such as a Zener diode, that enables the clamping circuit trigger threshold to be set at a value that is independent of the power supply voltage.

Schmitt trigger-configured ESD protection circuit

Growing community of inventors

Palm Bay, FL, United States of America

William R Young