International Business Machines Corporation

Other

William R Griffin

Lawrence G Heller

Albert Manhee Chu

John G Petrovick, Jr

Wayne Frederick Ellis

Larry Wissel

Ronald R Troutman

Allan Robert Bertolet

Robert W Bassett

Dennis R Whittaker

Billy H White

Susan A Murphy

James R Varner

Peter N Horowitz

An air-blow valve configured for clean-in-place capability is provided. The valve comprises a valve body defining a valve seat and internal fluid passageways. The valve further comprises valve components disposed within the valve body, including a plug, a piston, and a spring. The valve is separately operatively connected to a pressurized-air source and to a sanitizing-fluid source. In operation, the spring biases the piston, causing the plug to engage the seat, to prevent undesired fluid flow between the passageways and the connecting conduits. Alternatively, the spring biases the piston, causing the plug to disengage the seat, allowing fluid flow between the passageways and connecting conduits. Pressurized air is used to space the plug from the seat to achieve flow whenever desired, or alternatively to engage the seat to prevent fluid flow when desired. Periodic selective movement of the piston to space the plug from the seat, enables the cleaning solution to pass through the body and clean the internal passageways, the seat, and the plug, thereby rendering unnecessary disassembly of the valve and/or removal of the valve from the connecting conduits during valve cleaning.

Reconfigurable clean-in-place air-blow valve

An air-blow valve configured for clean-in-place capability is provided. The valve comprises a valve body defining a valve seat and internal fluid passageways. The valve further comprises valve components disposed within the valve body, including a plug, a piston, and a spring. The valve is separately operatively connected to a pressurized-air source and to a sanitizing-fluid source. In operation, the spring biases the piston, causing the plug to engage the seat, to prevent undesired fluid flow between the passageways and the connecting conduits. Pressurized air is used to space the plug from the seat to achieve flow whenever desired. Periodic selective movement of the piston to space the plug from the seat, enables the cleaning solution to pass through the body and clean the internal passageways, the seat, and the plug, thereby rendering unnecessary disassembly of the valve and/or removal of the valve from the connecting conduits during valve cleaning.

Clean-in-place air-blow valve

Cascode voltage switch (CVS) logic circuits include a CMOS logic tree having multiple logic branches and a bipolar, branch isolation transistor. Each logic branch of the logic tree changes state between a logic '1' and a logic '0', with a state change being manifested as a charging or discharging of the logic branch. The bipolar transistor comprises a multiple-emitter bipolar transistor wherein each emitter is electrically coupled to a different logic branch of the CMOS logic tree. A precharge circuit, coupled to the logic tree via the bipolar transistor, provides charge to an output of the CVS circuit prior to operation of said logic tree. The logic branches of the logic tree are charged and discharged substantially independently of one another thereby enhancing speed of the combinatorial logic circuit. Various circuit modifications and generalizations are also discussed.

Branch isolation circuit for cascode voltage switch logic

An apparatus and method for testing an access time of a macro embedded in a LSI chip. The apparatus includes a logical gate connected to the output latches of the macro, thereby controlling the access time of the macro, and a test latch for determining an on-chip delay time between a test signal for enabling the output latches and an input signal for enabling the macro. The method includes the steps of determining the on-chip delay time between the test signal and the input signal, thereby allowing the test signal to be synchronized with the input signal, supplying the synchronized test signal to the output latches for a manufacturer specified macro access time, and testing the latched output data from the macro.

Macro performance test

A signal delay circuit is provided which includes first and second circuits arranged parallel to each other, the first circuit having serially connected first and second transistors and the second circuit having a third transistor, and a fourth transistor connected from the common point between the first and second transistors to the second circuit, a signal is applied to one end of the parallelly arranged first and second circuits while the first, second and fourth transistors are turned on with the third transistor being turned off.

Transistor delay circuits

A system for testing a differential logic network is provided which includes a differential exclusive OR circuit having a plurality of inputs for receiving complementary signals from the differential logic network and first and second output terminals and means, e.g., a conventional exclusive OR circuit, for determining the voltage difference between the first and second output terminals to indicate the presence or absence of a fault or error in the differential logic network under test.

Random logic error detecting system for differential logic networks

A methodology is provided for reducing an arbitrary Boolean logic expression to static CMOS circuits by the use of a general matrix of P channel devices and N channel devices which are interconnected in accordance with the terms of Boolean logic expressions derived from a truth table. More specifically, from a Boolean expression a sum-of-products expression giving the 1 binary data outputs of a truth table having a 0 input is found. This is accomplished by complementing, or barring, the literals which are a binary 1 when the output is 1 and leaving true or unbarred the literals that are a binary 0. Then each input of a given product term is applied to the control gate of a P channel device, which devices are connected in series with one end tied to a source of potential and the other end of the series circuit connected to an output terminal. Each product term is arranged in parallel with other P channel device series circuits to form one half of a complete logic matrix. Similarly, for the other half of the matrix, a sum-of-products expression giving the binary 0 outputs of a truth table having a binary 1 for an input is found. Each input of a given product term is applied to the control gate of an N channel device, which devices are connected in series with one end tied to a potential reference point, such as ground, and the other end of the series circuit is connected to the output terminal. Each product term is arranged in parallel with other N channel device series circuits.

Methodology for making logic circuits

A differential logic system is provided for a complete logic family which has a first switching circuit that produces a given output signal at a first output node and a second switching circuit that produces a second output signal which is the complement of that of the given output signal at a second output node. First and second clocked devices are connected from the first and second output nodes, respectively, to a voltage source, and first and second inverters are connected to the first and second output nodes, respectively. Additionally, a regenerative circuit may be connected between the first and second output nodes and the voltage source.

Clocked differential cascode voltage switch logic systems

A CMOS driver or pull up circuit is provided which includes a pull up transistor of a given conductivity type and a precharged bootstrap capacitor which discharges fully through a second transistor having a conductivity type opposite to that of the pull up transistor to the control gate or electrode of the pull up transistor. A third transistor may be used to initiate discharge by providing power supply voltage to the control gate of the pull up transistor.

CMOS bootstrapped pull up circuit

A support belt for engaging the handle end of a fishing rod. The support belt includes a waist-engaging member manufactured of a self-supportive resilient material, with the belt having a front surface and arms coupled thereto for engaging the waist of the wearer. Each of the arms includes at a distended end thereof a section which is bowed against the small of the back of the wearer. The releasable support belt assumes a flexible C-shape for engaging the waist of the wearer. The support belt also includes a coupler releasably attached to the front surface of the belt for receiving and restraining therein the handle end of a fishing rod. In a specific embodiment this coupling device includes a ball and socket assembly including nodes and channels therein for prohibiting the rotation of the fishing rod about a longitudinal axis thereof.

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Shelburne, VT, United States of America

William R Griffin