Hughes Aircraft Company

Packard Hughes Interconnect Company

Other

Delphi Technologies, Inc.

Hughes Electronics Corporation

William R Crumly

Haim Feigenbaum

Christopher M Schreiber

Blake F Woith

Eric Dean Jensen

John Pasiecznik, Jr

Chris M Schreiber

Jacques F Linder

David Bryan Swarbrick

Robert K Betz

Pete Henry Hudson

Mordechay Schlesinger

Dennis F Elwell

Harold C Bowers

James R Walen

John De Nuto

Robert Martinez

Robert Joseph Cochrane

A fingerprint reader includes a display screen composed of an array of energy emitting pixels covered by a transparent cover, at least one sensor coupled along an edge of the display screen, a display driver directing the array of energy emitting pixels of the display screen to illuminate in a predetermined sequence, and a microprocessor in communication with the display driver and the at least one sensor. The microprocessor knows the location of the energy emitting pixel being illuminated and the specific time at which the illumination occurs. In use, and when at least one finger is placed on the transparent cover and the display driver is activated, energy from each energy emitting pixel sequentially illuminated is reflected off the fingerprint to the at least one sensor. The energy received at the at least one sensor is at different intensity levels depending upon the ridges and valleys of the at least one fingerprint. The at least one sensor sends a signal to the microprocessor regarding the energy intensity level, from which the microprocessor creates a fingerprint image as the energy emitting pixels are sequentially illuminated.

Fingerprint reader

A fingerprint reader includes a display screen composed of an array of energy emitting pixels covered by a transparent cover, at least one sensor coupled along an edge of the display screen, a display driver directing the array of energy emitting pixels of the display screen to illuminate in a predetermined sequence, and a microprocessor in communication with the display driver and the at least one sensor. The microprocessor knows the location of the energy emitting pixel being illuminated and the specific time at which the illumination occurs. In use, and when at least one finger is placed on the transparent cover and the display driver is activated, energy from each energy emitting pixel sequentially illuminated is reflected off the fingerprint to the at least one sensor. The energy received at the at least one sensor is at different intensity levels depending upon the ridges and valleys of the at least one fingerprint. The at least one sensor sends a signal to the microprocessor regarding the energy intensity level, from which the microprocessor creates a fingerprint image as the energy emit emitting pixels are sequentially illuminated.

A method for forming a nanolaminate structure is provided which comprises plating a substrate with layers of substantially a first metal and substantially a second metal using an electrolytic plating process and controlling the plating current to obtain a desired current density at the cathode, which is maintained within a predefined range.

Commercial plating of nanolaminates

Generally, the invention includes a product for and a method of wafer scale burn-in testing. The product may include a substrate or semiconductor device having a nonplanar surface (multi-layer substrate), an interposer layer over the nonplanar surface and electrical traces on the interposer having raised electrical features for connecting to contact pads on a semiconductor wafer. The interposer layer may take on a variety of configurations and compositions. The interposer layer may be an adhesive layer, or a combination of a flexible layer for supporting the electrical traces and raised features, and a compressible layer. Vias may be provided from the electrical traces down to contact pads on the substrate or device having a nonplanar surface. Alternatively, electrical traces having a first and second raised features extending in opposite directions may be utilized to make a connection between the wafer and the multi-layer substrate.

Wafer scale burn-in socket

The present invention includes composite support substrate for both flexible and rigid board circuit applications and method of making the same. The composite substrate is composed of at least two materials formed under the circuitry. A first material is a conventional matrix such as a polyimide/acrylic adhesive, and a second material having unique properties that are useful locally in isolated locations. For instance, the second material may be nonporous to moisture, optically clear, and/or thermally conductive. The second material is integrated into the circuit matrix at specific localized areas where desired with portions coplanar with the first material so that circuit traces remain continuous as they pass from the first material to the second. For example, an integrated circuit chip may be isolated from the polyimide matrix, which is porous in moisture, by using the second material that is nonporous to moisture at locations where the integrated circuit chip is to be attached, thus isolating the integrated circuit chip from the polyimide and preventing moisture from flowing through to the chip.

Bumps with plural under-bump dielectric layers

A chip scale package includes a mandrel built flexible circuit having a circuit trace on a first surface and an aperture extending therethrough. The chip scale package includes a pad covering the aperture on the first surface of the flexible circuit and a raised interconnection member extending outwardly from the pad. The chip scale package also includes a chip secured to a second surface of the flexible circuit, such that the chip is electrically connected to the pad.

Chip scale package

The present invention includes stack flexible circuit layers having raised features or bumps for Z-axis interconnection to another circuit layer or electrical component. An intermediate or adhesive layer separates each circuit layer. The multiple layers are stacked with the raised features from one layer aligning with pads of an overlying or underlying layer and are laminated so that the raised features pierce the intermediate or adhesive layer and make electrical contact with the corresponding pad of the adjacent circuit layer. The raised features may have a shape sufficient to penetrate the intermediate and/or the adhesive layer allowing blind vias to be made without pre-drilling the intermediate or adhesive layers. The intermediate layer of film can have a function other than or in addition to that of an adhesive. For example, in a connector application where the raised feature is used to make contact to corresponding pads, a film that has a low permeability to water could be placed between the raised features and corresponding pads on the next layer. The low water permeability film would act as a sealant to prevent environmental attack on the connection. The raised feature would penetrate the sealant to make electrical contact to a corresponding pad. This would allow the connector to be disassembled and reconnected.

Layer to layer interconnect

The invention includes the use of a decal to produce a packaged chip either at the chip level or wafer level. The decal includes a substrate containing circuitry that routes the chip output pads to bumps prepared for package attachment to another substrate such as a printed circuit board. The decal can be applied either to the wafer or to a single chip. The decal protects the chip and if necessary changes the interconnection density so that the chip can be interfaced with a printed circuit board or other electronic device. This configuration also may allow the packaged integrated circuit to be tested utilizing the bumps on the decal as temporary electrical contact features.

Wafer level decal for minimal packaging of chips

The present invention generally includes a process in which a mandrel for semi-additive construction of circuitry is fabricated by laminating shim stock or foil of stainless steel onto a suitable deformable substrate such as a polyimide glass board. Dimples for making raised features on circuitry are formed in the mandrel with a tool. The use of shim stock makes the mandrel relatively light and suitable for automated processing similar to that used to construct circuits on circuit boards.

Method of making mandrels and circuits therefrom

Disclosed is a flexible substrate having a thermal contact that provides a continuous high thermal conductivity path from a heat generating component to a heat sink. In one embodiment, the thermal contact includes a metallic trace including a raised feature of thermally conductive material. A solder ball or fillet may be used to make a connection between the raised feature and the heat generating component or between the raised feature and the underlying heat sink or both.

Integrated circuit with a chip on dot and a heat sink

A method of making a circuit with raised features includes the steps of: forming a mandrel having a plurality of depressions therein; coating said mandrel and depressions with a coating that is readily separable from the mandrel and said depressions; forming a pattern of circuit traces on said coating and in a first subset of said depressions; forming a substrate on said traces; adding a material to said coating at least in a second set of said depressions not containing circuit traces; removing said traces, said substrate, said material and said coating from said mandrel wherein a plurality of raised features project from a plane of said circuit traces; and removing the coating from said traces, said raised features, said material and said substrate, wherein a first subset of said raised features comprises conductive raised features and wherein a second subset of said raised features comprises nonconductive raised features.

Method of making circuit with conductive and non-conductive raised

A flexible membrane (12) of an integrated circuit chip test probe is provided with raised contact features (14) on one side arranged in the pattern of contact pads of the chip to be tested. During manufacture, the membrane, in the area of its raised contact features, is specifically shaped by applying a vacuum to the outside of the membrane and casting a solid resilient elastomer (26) in place on the other side of the membrane to act as a shape retaining solid backup and to provide an anti-drape (226) shaped membrane (212) or to ensure planarity (326) of the ends of the membrane contact features (314). The vacuum may be used to pull the membrane and its contacts against a shape defining mandrel (60, 260, 360) while the elastomer is cast into place.

Cast elastomer/membrane test probe assembly

A membrane connector or test probe having a group of connector or test probe contacts (14) in a central contact section of the membrane (12) is initially stretched by being axially displaced from the plane of the peripheral membrane support (10). The test probe is cause to contact the pads (43,44) of device (42) to be tested and is then moved through an over travel distance that tends to decrease the amount of the stretch of the membrane. This decrease in stretch effects a small amount of lateral radial displacement of the test probe contacts to provide a scrubbing action that enhances electrical engagement with a circuit chip pad that may have a poorly conductive oxide coating. Substantially all of the stretch of the membrane is caused to be concentrated in and about the central contact section of the membrane at which the test probe contacts are located. This is accomplished by causing the area of the membrane between its peripheral support and the central section to be substantially inextensible as by bonding an inextensible metallic shield (50) to these portions of the membrane.

Membrane connector with stretch induced micro scrub

A flexible membrane (12) of an integrated circuit chip test probe is provided with raised contact features (14) on one side arranged in the pattern of contact pads of the chip to be tested. During manufacture, the membrane, in the area of its raised contact features, is specifically shaped by applying a vacuum to the outside of the membrane and casting a solid resilient elastomer (26) in place on the other side of the membrane to act as a shape retaining solid backup and to provide an anti-drape (226) shaped membrane (212) or to ensure planarity (326) of the ends of the membrane contact features (314). The vacuum may be used to pull the membrane and its contacts against a shape defining mandrel (60,260,360) while the elastomer is cast into place.

Method of making a cast elastomer/membrane test probe assembly

An inexpensive arrangement for mounting multiple, closely spaced integrated circuit chips (18, 20, 22, 24) on a low temperature co-fired ceramic (LTCC) substrate (10) uses a mandrel-produced thin film decal (26) having patterns of interconnecting conductive traces (34, 46, 47) that connect to the fine pitch connecting pads (60) of the integrated circuit chips at one end and connect to the relatively coarse pitch connecting pads (50) of the low temperature co-fired ceramic substrate at the other end. The interconnect decal is formed independently of the LTCC substrate and is provided with chip connections at a pitch of about 0.004 inches. The interconnect pads of the decal are connected by conductive traces on the decal to the LTCC pads which have a pitch in the order of about 0.01 inches or greater. The decal, which is formed independently of the LTCC substrate, is connected to the substrate pads by one of several different electrically conductive adhesives, including silver loaded epoxy, Z-axis conductive epoxy and anisotropically and isotropically conductive epoxy or low melting temperature solder. The decal enables use of a 'fan-out' arrangement in which connections are routed under the chip.

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Anaheim, CA, United States of America

William R Crumly