Standard Microsystems Corporation

William R Chiechi

Neil A Winchester

Paul Brant

Charles A Forni

Bryan A Whitehead

Hariramanathan Ramakrishnan

Maksim A Azarov

Anthony Tarascio

A network device (ND) includes a first interface controller operable to transfer data between the ND and a host processing unit (host), a second interface controller operable to transfer data between the ND and the host, a network interface configured to interface the ND with a network, and a control unit operable to: receive incoming data from the network, process the incoming data, and transmit the processed incoming data to the host through the second interface controller; or, receive outgoing data from the host through the second interface controller, process the received outgoing data, and transmit the processed outgoing data to the network. The first interface controller, the control unit, and the network interface are together operable to enable the host to transmit and/or receive other data to and/or from the network and the first interface controller. The host and the control unit share a same network address.

Network traffic controller (NTC)

A Network Device (ND) may be configured to enable secure digital video streaming for HD (high definition) digital video systems over a standard network. The ND may operate in at least one of two modes, a co-processor mode and a stand-alone mode, and may provide at least three high level functions: network interface control (NIC), video streaming offload (VSO), and stand-alone video streaming (SVS). To seamlessly execute the VSO functionality, the ND may be configured to have two network stacks running synchronously on a single network interface having a single network address. The two network stacks may share the data traffic, while the Host network stack may act as a master, and configure the ND network stack to accept only specifically designated traffic, thus offloading some of the data processing to the processor configured in the ND. The ND network system may appear as an ordinary network controller to the Host, from which the user may configure the ND network driver to obtain/set the network address, configure the physical layer link speed and duplex mode, configure the multicast filter settings, and obtain and clear the network level statistics.

An audio-visual content delivery system includes an interface to communicate with a local area network (LAN). A packet processing circuit in the system may filter and route Ethernet packet data received from the LAN, to specific ports and/or queues without host processor intervention. The packet processing circuit may utilize a set of filter and routing mechanisms configurable in hardware to interpret various Internet Engineering Task Force networking transport protocols, and may transfer the packet data in a format recognized by a variety of consumer subsystems, each of which may be coupled to the packet processing circuit. The packet processing circuit may be implemented as a semiconductor device, and may allow encapsulated application data to be routed to a plurality of different types of application sinks or processors, forming a point-to-point or multi-point serial or parallel data stream over a standard transport covering numerous levels of the ISO data communications stack.

High speed ethernet MAC and PHY apparatus with a filter based ethernet packet router with priority queuing and single or multiple transport stream interfaces

In one embodiment, an audio-visual content delivery system, such as a set-top box/personal video recorder system, is configured to interface with a local area network (LAN). A packet processing circuit comprised in the system may be configured to filter and route Ethernet packet data received from the LAN to specific ports and/or queues without host processor intervention. The packet processing circuit may utilize a set of filter and routing mechanisms configurable in hardware to interpret various Internet Engineering Task Force (IETF) networking transport protocols, and may transfer the packet data in a format recognized by a variety of consumer subsystems, each of which may be coupled to the decoder. The packet processing circuit may be implemented as a semiconductor device, and may allow encapsulated application data, (encapsulated using standardized encapsulation techniques), to be routed to a plurality of different types of application sinks or processors, forming a point-to-point or multi-point serial or parallel data stream over a standard transport covering numerous levels of the ISO data communications stack.

A memory alignment system for efficient data transfer between a local memory that is configured in a host system, and a remote memory, comprises a data communications controller configured in the host system to align transmitted and received data based on formatting information received from the host system. When transmitting data from local system memory, for example over an Ethernet connection, communications control driver software may first write formatting information corresponding to the data into the data communications controller. The data communications controller is operable to align the data based on the formatting information as the driver software moves the data into a configurable transmit data buffer inside the data communications controller. Similarly, the driver software may write formatting information for receive data into a receive-format configuration buffer. The data communications controller may align the receive data based on the receive-formatting information as the receive data is being read by the host system. Because the data communications controller performs all the required data alignment, no data alignment by the host processor is required.

Growing community of inventors

Port Jefferson, NY, United States of America

William R Chiechi