Fairchild Semiconductor Corporation

Nvidia Corporation

William R Chester

Cary L Delano

A system for driving a plurality of loads each connected to respective signal terminals and to a shared common load terminal. Multiple conventional signal amplifiers each provide a content signal at one of the signal terminals. The signal amplifiers each have a primary-power upper terminal, to receive a first voltage (V) from a first power supply, and a primary-power lower terminal, to receive a second voltage (V) from the first power supply. A bias amplifier biases the common load terminal, and has a secondary-power upper terminal to receive a third voltage (V) from a second power supply and a secondary-power lower terminal to receive a fourth voltage (V) from the second power supply, wherein V&#x2266;V&#x3c;V&#x2266;V.

Method and apparatus for efficient load biasing

An audio amplifier system having improved power efficiency by wasting less power in its bias voltage circuit. An amplifier provides a voice signal to a first (+) input of a loudspeaker and a high efficiency converter provides a bias voltage to a second (&#x2212;) input of the loudspeaker. In multi-loudspeaker systems, a single high efficiency converter can bias all the loudspeakers at a common node. The high efficiency converter can be a charge pump or a buck converter or the like, and has greater than 90% efficiency.

High efficiency converter providing switching amplifier bias

A voltage reference generation circuit having switch pairs coupled to systematically commutate a flying capacitor among adjacent pairs of voltage rail outputs. The circuit requires only a single flying capacitor, N+1 switch pairs, and N storage capacitors, to generate N intermediate voltage references between VDD and GND. A signal generator produces N+1 non-overlapping switch enable signals to systematically enable the switch pairs and commutate the single flying capacitor between the rail pairs. The flying capacitor remains charged to VDD/(N+1). The N storage capacitors hold their respective reference outputs at VDD*N/(N+1), VDD*(N&#x2212;1)/(N+1), VDD*(N&#x2212;2)/(N+1), and so forth.

Growing community of inventors

Morgan Hill, CA, United States of America

William R Chester