Microsoft Technology Licensing, LLC

William Paul Hovis

Garrett Douglas Blankenburg

Andres Felipe Hernandez Mojica

Peter Anthony Atkinson

Robert James Ray

Brian K Langendorf

Erng-Sing Wee

Samy Boshra-Riad

Gregory Mayo Daly

Steven William Ranta

Rich Tat An

Andres Felipe Hernandez

Francine Mary Shammami

Vlad Radu Calugaru

Andrew Benson Maki

Garrett Blankenburg

Peter Atkinson

Brian Keith Langendorf

Techniques and systems for enhanced adjustment of quantities and placement of decoupling capacitance on circuit boards for integrated circuits is provided herein. An example method includes iterating application of a load profile across different populations of decoupling capacitors on a circuit board for supply voltage domains of an integrated circuit device until a target transient performance is reached for the supply voltage domains. The load profile is applied onto electrical connections corresponding to the supply voltage domains for the integrated circuit device. The method also includes generating a capacitor population configuration for the circuit board based on a population of the decoupling capacitors that achieves the target transient performance.

Load adjusted populations of integrated circuit decoupling capacitors

Power control and decoupling capacitance arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes a first circuit assembly comprising a first circuit board coupled to an integrated circuit device, wherein the first circuit board is coupled to first surface of a system circuit board. The assembly also includes a second circuit assembly comprising a second circuit board having one or more voltage adjustment units configured to supply at least one input voltage to the integrated circuit device, wherein the second circuit board is coupled to a second surface of the system circuit board and positioned at least partially under a footprint of the integrated circuit device with respect to the system circuit board.

Through-board power control arrangements for integrated circuit devices

Clock control arrangements for integrated circuit devices are discussed herein. In one example, a method of operating an integrated circuit device includes monitoring indications of pending operations for a processing core of an integrated circuit, and determining a predicted change in workload for the processing core based at least on a portion of the indications of the pending operations. The method also includes altering a clock frequency of a clock signal provided to the processing core based at least on the predicted change in the workload.

Clock frequency adjustment for workload changes in integrated circuit devices

Power control arrangements for integrated circuit devices are discussed herein. In one example, an assembly includes an integrated circuit device comprising one or more processing cores and a power domain configured to distribute a supply voltage to the one or more processing cores. The assembly also includes a charge injection circuit coupled to the power domain of the integrated circuit device, and configured to selectively couple electric charge into the power domain to predictively offset at least portions of voltage transients in the power domain.

Predictive voltage transient reduction in integrated circuits

Power supply architectures and enhanced power control techniques are presented herein. In one example, a system includes a plurality of power supply phases and a system processor. The system processor comprises a processing unit comprising a plurality of processing cores, a plurality of power domains configured to segregate power distribution for the processing unit into sets of the plurality of processing cores, and external connections configured to couple individual ones the plurality of power domains to individual ones of the plurality of power supply phases.

Integrated circuit power domains segregated among power supply phases

Power supply circuitry and enhanced associated techniques are presented herein. In one example, a method includes powering a circuit with a plurality of power supply phases, and monitoring thermal properties of the plurality of power supply phases. Responsive to the thermal properties indicating at least one of the plurality of power supply phases exceeds a thermal threshold, the method includes selecting a dormant power supply phase to supplant the at least one of the plurality of power supply phases.

Thermal rotation of power supply phases

An example method for adjusting operation of an integrated circuit includes testing a plurality of electronic elements of the integrated circuit including one or more redundant electronic elements designated as inactive according to a manufacturer's default configuration of the integrated circuit to determine one or more operating parameters of the integrated circuit. The method further includes selecting a subset of electronic elements from the plurality of electronic elements based on the one or more operating parameters, wherein the subset of electronic elements is designated as active according to an updated configuration of the integrated circuit, and controlling operation of the integrated circuit using the updated configuration instead of the manufacturer's default configuration.

Integrated circuit operation adjustment using redundant elements

Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.

Processor device supply voltage characterization

Computing assemblies, such as blade servers, can comprise a plurality of modular computing elements coupled onto an associated circuit board assembly. Assemblies and systems having enhanced individual computing module placement and arrangement are discussed herein, as well as example systems and operations to manufacture such assemblies. In one example, a method includes executing a performance test on a plurality of computing modules to determine at least variability in power consumption across the plurality of computing modules, and binning the plurality of computing modules according to graduated levels of the variability in power consumption. The method also includes selecting from among the graduated levels for placement in an assembly of ones of the computing modules in a progressively lower power consumption arrangement with relation to an airflow of the assembly.

Thermal arrangement of modules in server assemblies

A computing device is provided that includes a processor, a primary power supply, and a voltage regulation module. The voltage regulation module is configured to determine a load line for the processor and monitor a voltage and a current to the processor. While monitoring the voltage and current, the voltage regulation module is further configured to regulate the voltage to the processor to trend toward a voltage setpoint defined by the load line. While regulating the voltage, the voltage regulation module is further configured to clamp the load line at a clamping voltage to limit the regulated voltage output by the voltage regulation module from falling below a predetermined device minimum operation voltage when the monitored current exceeds a device maximum current value. The voltage regulation module is further configured to output electrical power at the regulated voltage to the processor.

Load line regulation via clamping voltage

Voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of determining operating voltages for a processing device includes executing a voltage adjustment process to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage. During the voltage adjustment process, the method includes applying incrementally adjusted input voltages to the processing device, operating the processing device according to a functional test that exercises the processing device in context with associated system elements of a computing assembly, and monitoring for operational failures of at least the processing device during application of each of the incrementally adjusted input voltages. Responsive to the operational failures, the method includes determining corresponding values of the incrementally adjusted input voltages and establishing an input voltage based at least in part on the corresponding values of the incrementally adjusted input voltages.

Input voltage reduction for processing devices

Thermal reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In a first example, a method of operating a voltage control system for a processing device includes operating the processing device in a computing assembly at a selected performance level, the processing device supplied with at least one input voltage at a first voltage level. The method includes monitoring thermal information associated with the computing assembly, and when the thermal information indicates a temperature associated with the computing assembly exceeds a threshold temperature, adjusting the at least one input voltage level supplied to the processing device to a second voltage level lower than the first voltage level and continuing to operate the processing device at the selected performance level.

Voltage based thermal control of processing device

A method for controlling a cooling system for a device includes determining a power load of the processing system, determining a power load of the device, setting a first thermal setpoint based at least in part on the power load, determining a temperature of the device, adjusting a response of the cooling system based at least in part on the first thermal setpoint, detecting a change in the power load of the device to a higher power load having a higher magnitude acoustic response, in response to detecting the change in the power load, setting a second thermal setpoint having a lower magnitude acoustic response at the higher power load, the second thermal setpoint being based at least in part on a determined second corresponding acoustic response curve, and adjusting the response of the cooling system based at least in part on the second thermal setpoint.

Power based thermal management of device

Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes receiving a voltage characterization service over a communication interface of the computing apparatus as transferred by a deployment platform remote from the computing apparatus. The method includes executing the voltage characterization service for a processing device of the computing apparatus to determine at least one input voltage for the processing device lower than a manufacturer specified operating voltage, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, restarting the processing device using a recovery voltage higher than a current value of the iteratively adjusted voltages.

Processor device voltage characterization

Secure voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method of controlling operating voltages for a processing device includes initializing a security portion of the processing device after application of input voltages to the processing device as supplied by voltage regulation circuitry according to voltage identifiers (VIDs) established for the processing device. The method includes, in the security portion, generating adjusted input voltages based on at least the VIDs and authenticated voltage offset information stored according to a digitally signed security process, and instructing the voltage regulation circuitry to supply the adjusted input voltages to the processing device.

Growing community of inventors

Sammamish, WA, United States of America

William Paul Hovis