Seagate Technology Incorporated

Xiotech Corporation

Formulus Black Corporation

William Pagano

Stephen J Sicola

Clark Edward Lubbers

David Peter DeCenzo

David Louis Spengler

Aaron Danis

Seyedamin Rooholamin

Randolph Scott Crupper

Yaojie Lu

Michael J Hare

In some embodiments, systems, methods, and devices disclosed herein are directed to RAM-based computer systems, methods, and devices that offer improved performance over conventional computer systems. In some embodiments, the RAM-based computer systems, devices, and methods described herein can function without reliance on conventional storage devices and thus are not subject to the bottleneck in processing speed associated with conventional storage devices. Rather, in some embodiments, the RAM-based computer systems, devices, and methods described herein include and/or utilize a processor and RAM, wherein the RAM is used for mass data storage, without reliance on a conventional hard drive, solid state drive, or any other peripheral storage device.

Random access memory (RAM)-based computer systems, devices, and methods

Apparatus and associated methodology involving use of a multiple-core processor. A reserved hard allocation of resources partition (HARP) dedicates physical resources for operably supporting a first processing function. The dedicated resources of the reserved HARP include a reserved physical memory that is sized in relation to data processing requirements of the first processing function. The dedicated resources of the first HARP also include a command buffer residing in the reserved physical memory. The dedicated resources of the first HARP also include a reserved physical core of the multiple core processor. The apparatus also includes a second HARP having resources that are used for operably supporting a different second processing function. The second HARP resources operably put transaction requests from the second processing function to the command buffer in the first HARP.

Hard allocation of resources partitioning

An apparatus and associated method is provided employing data capacity determination logic. The logic dynamically changes a data storage capacity of an electronic data storage memory. The change in capacity is made in relation to a transient energy during a power state change sequence performed by the electronic data storage memory.

Changing power state with an elastic cache

Disclosed is a storage system and method that provides multi-path bus and component interconnection and isolation in a data storage system. A plurality of data storage devices in a removable assembly are connected to a fabric that is configurable to connect some or all of the data storage devices (or 'drives') to a drive controller and configurable to isolate one or more data storage devices from the drive controller. Multiple controllers, fabrics, and interconnecting buses may be employed to provide redundancy in the event of a connector, bus, or controller failure. Computer program code operating in a host, interface controller, and/or drive controller configures the fabric to isolate failed devices and may be employed to optimize data transfer rates. Data storage devices may be multi-ported. The fabric may comprise any device or devices capable of configurably interconnecting data storage devices to one or more controllers and may comprise multiplexers, cross point switches, port bypass controllers. Fabrics may also provide translation or conversion of one bus or interface format to another format.

Multipath redundant storage system architecture and method

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Colorado Springs, CO, United States of America

William Pagano