Intel Corporation

William O Brooks

David G Ellis

Gerald A Budelman

Gary W Brady

Louis J Johnson

Richard K Helm

Raymond E McNamee

Alan J Cossitt

A power validation tool is used in place of an actual microprocessor to validate a power source to determine if the power source is capable of meeting power requirements of the microprocessor. The validation tool is placed into a socket reserved for the microprocessor. A pulse generator supplies a pulse signal to toggle a load between minimum and maximum load current values, while a window comparator monitors the voltage to determine if the load change causes the source voltage to rise above or fall below an accepted range.

Power validation tool for microprocessor systems

An address converter that reduces the number of address bit changes between successive sequential addresses is provided to a RAM address bus for a sequentially accessed RAM. In the presently preferred embodiment, the address converter comprises a plurality of XOR gates for converting the access addresses into gray coded access addresses having at most one address bit change between successive access addresses. As a result, the power consumed and the noise generated over the address bus is reduced, thereby conserving power available and minimizing device package pins required by the digital system having the RAM and the RAM address bus.

RAM addressing apparatus with lower power consumption and less noise

A means and method for training an electronic network of analog cells. A generic universal programmer interface (GUPI) is provided to enable connection of an adaptor to a host computer via a personal computer personal programmer (PCPP) for training an ETANN chip. An opening in the top of the GUPI provides for installation of the adaptor. The adaptor of the present invention plugs into the GUPI module to provide for connecting either an ETANN chip or a Confidence Test Module (CTM) for access by the user via the host computer. A target socket located on the top surface of the adaptor allows the user to physically connect the ETANN chip or the CTM to adapter of the present invention. The adaptor provides the resources needed for training an ETANN in several modes including: digital to analog conversion for driving the ETANN's analog input pins; a single analog to digital converter with an 80 channel analog multiplexer for measuring the ETANN's analog outputs; neuron perturbation circuitry; synapse current measurement circuitry; neuron sum measurement circuitry; V.sub.PP management circuitry; a binary searching synapse weight measurement circuit; isolation switches and the logic necessary to connect all these resources to the ETANN and the GUPI base. The present invention also includes host computer software necessary to control the operation of the adapter.

Training system for neural networks and the like

Growing community of inventors

Aloha, OR, United States of America

William O Brooks