L3 Technologies, Inc.

Sangamo Weston, Inc.

Fairchild Weston Systems, Inc.

Loral Fairchild Corporation

Weston Instruments, Inc.

Schlumberger Technology Corporation

Lockheed Martin Corporation

L3harris Aviation Products, Inc.

William N Waggener, Jr

Michael E Weed

Gene F Schroeder

Thomas Albert Bray

John P Keal

Nimish Shah

An aircraft recorder system is provided in which a vibration sensor including at least one of a micro-electromechanical systems (MEMS) microphone and a MEMS accelerometer. The system further includes a cockpit voice recorder (CVR) and an active microphone. The active microphone and the vibration sensor each output signals to a signal processor including a subtractor configured to output, to the CVR, a signal that is a result of a subtraction of the signal from the vibration sensor from the signal from the active microphone.

Method for suppressing vibration coupled signals in a microphone for flight recorders

Various systems may benefit from appropriate thermal protection. For example, various flight recorder systems may benefit from thermal isolation of a flight recorder memory core. A system can include a memory core of a flight recorder. The system can also include an inner chamber housing the memory core. The system can further include an outer chamber housing the inner chamber with a vacuum between the inner chamber and the outer chamber. The system can additionally include a signal path from avionics equipment to the memory core through the outer chamber and the inner chamber. The system can also include a power path for the memory core through the outer chamber and the inner chamber.

Thermal isolation of flight recorder memory core

Various systems may benefit from appropriate thermal protection. For example, various flight recorder systems may benefit from a vacuum protected flight recorder memory. A system can include a memory core of a flight recorder. The system can also include an inner chamber housing the memory core. The system can further include an outer chamber housing the inner chamber with a vacuum between the inner chamber and the outer chamber. The system can additionally include a signal path from avionics equipment to the memory core through the outer chamber and the inner chamber. The system can also include a power path for the memory core through the outer chamber and the inner chamber.

Vacuum protected flight recorder memory

Various systems may benefit from appropriate triggers to action. For example, various deployable safety devices, such as emergency locator transmitters and flight recorders, may benefit from a multiple input release mechanism. A method can include identifying the presence of at least one crash indicator. The method can also include performing an analysis of aircraft distress based on aircraft parameters other than the at least one crash indicator to provide an analysis result of aircraft distress. The method can further include triggering the release of a safety device contingent upon the presence of the at least one crash indicator being accompanied by a positive result of aircraft distress.

Multiple input release mechanism for deployable emergency locator transmitter and flight recorder

A system and method for storing data in a linked list memory architecture maintains several key list parameters. When data to be stored is received, a memory manager determines the list in which the data belongs and retrieves several of the parameters. The parameters retrieved indicate the address of the current location at which the received data is to be stored and the address of the next location that is to be linked to the current list. The memory manager writes the data to the current location pointed to by the first address and writes the second address into a pointer field in that current location. Because the address of the next location in the list is determined before data is written to the current location, this next address can be written in the same cycle in which the data is written.

System and method for generating a linked list in a computer memory

A packet processor uses service priority and loss priority to designate a class of service for packet data. The service priority is used to determine the priority by which packets are routed out of the packet processor. The loss priority is used to determine which packets, if any, are discarded when buffer fullness exceeds a predetermined threshold. When a packet is received, the fullness of the packet buffer and/or a queue within the buffer is checked to determine whether a threshold is received. A decision is made whether to discard the packet based on the loss priority and the buffer fullness. A buffer manager, examines the fullness of each queue within the buffer and determines which class of packets to read out of the buffer.

Packet processor having service priority and loss priority features

A computer bus for transferring data among a plurality of modules coupled thereto, and having flexible, distributed bus arbitration. A plurality of data lines is operable to transfer bits of data among modules attached to the bus. A single arbitration line is coupled to each module, and is used to indicate whether the bus is available for the next bus cycle. A bus packet clock, called a BUP clock, is used to divide the bus into cycle periods called BUP time slots. An access time clock further divides these BUP time slots into time access slots. The BUP time slot is the unit of time for which a module will be granted access to the bus. The BUP time slot is selected so that modules will be granted access to the bus for a length of time defined by a packet length. Each module on the bus is provided with arbitration circuitry for determining whether that module will be granted access to the bus for the next BUP time slot. The arbitration circuitry counts the number of accessed time slots and compares the counter value to a module priority value and outputs a comparison time pulse when the values compare. A module with a lower priority number will pull the arbitration line low and claim the bus for the next BUP time slot if this module is requesting the bus for the next BUP time slot. Once a module has pulled the arbitration line low, no other module will be granted access to the bus for the next BUP time slot. When the next BUP time slot occurs, the module granted access to the bus for that period will be given access, and the counters of each module will be reset, and the priority of each module updated.

Distributed arbitration with programmable priorities

A high-speed floating point conversion apparatus and method are disclosed, with special reference to selectable conversion of 'source' IEEE format numbers to any of the 'destination' IBM, DEC, or SEL formats. In the preferred embodiment, the exponent is input to a shift control block. The exponent is converted to a different base, resulting in a remainder. The remainder of the exponent base conversion is input to the shift position control input of a shift register (preferably a barrel shifter) which has received the fraction (or mantissa) of the original floating point number. The fraction is shifted an amount necessary to compensate for the exponent's base conversion. The shift position control bits are available after a very short period of time, so that the shifting process of the barrel shifter is also completed quickly. The exponent and shifted fraction (or mantissa) are then input to format conversion units which format the data bitwise as necessary for a particular output format. Advantageously, clamping functions within the format conversion units handle special cases such as infinitites. From the format conversion units the converted data is steered to appropriate output buffers. In parallel with the floating point data conversion process occur such processes as tag and index processing.

Floating point conversion device and method

A frequency-hopping datalink and providing communication between a base station, relay unit and multiple remote units utilizes time-division multiplexing and transmits information signals containing information relevant to the next frequencies of transmission. Signals from the base station are transmitted on a first frequency to a relay unit which retransmits the signals on a second frequency to a group of remote units. The information signal from the base station contains information concerning the frequencies of the next transmission and the time slot allotted for the remote units to respond. The remote units respond back at the first frequency which is received by the relay unit and rebroadcast to the base station at the second frequency. The first and second frequencies are changed after each message in accordance with a pseudo-random sequence generated either at the base station (and transmitted in encrypted form) or by means of a pseudo-random sequence generated at each remote unit and the relay unit, whose initial state is reset by an internal or externally derived time reference and whose pattern is determined by an internal key.

Secure communication system for multiple remote units

A frequency and phase demodulating circuit provides direct frequency demodulation utilizing only addition, subtraction and multiplication steps. Division of signals is avoided, as is the need for a look-up table of trigonometric values corresponding to the results of such division. By maintaining a substantially constant input amplitude to a quadrature sampler, a number of approximations may be made without introduction of error. Compensation for actual signal variation, as well as for first order errors due to the approximation process of the invention, results in accurate frequency evaluation and avoids the necessity for differentiating an initial phase determination.

Digital demodulator for continuously phase or frequency modulated signals

An adaptive differential phase shift keyed (PSK) signal demodulator which optimally tracks changes in the symbol rate of the signal. An input signal is delayed by one symbol period by passing the signal through a charge coupled device (CCD) clocked by pulses phase locked to the symbol rate (F.sub.br) by a phase locked loop, the phase locked loop also outputting clock pulses at the symbol rate to strobe a symbol decision circuit. The CCD has L stages and is clocked at a rate L.multidot.F.sub.br. As the phase locked loop tracks changes in the symbol rate, the clock pulses are varied in rate so that the CCD delay is adaptively optimized for a given symbol rate. Digital tuning is provided by an adjustable divider circuit coupling the voltage controlled oscillator of the phase locked loop to the CCD, so that by digitally selecting the division ratio the demodulator is tuned to a different symbol rate.

Adaptive differential PSK demodulator

The disclosure is applicable for use in a logging-while-drilling apparatus for obtaining subsurface measurements during drilling in a fluid-filled borehole. Acoustic carrier waves are generated downhole in the borehole fluid and are PSK modulated in accordance with digital data representative of downhole measurements. The PSK modulation is obtained by momentarily unidirectionally either decreasing or increasing the frequency of the acoustic carrier signal until either a desired phase lag (for a decrease in frequency) or phase lead (for an increase in frequency) is imparted to the acoustic carrier signal. An uphole receiving subsystem includes transducers for converting the modulated acoustic carrier waves to electronic signals and circuitry for demodulating the electronic signals to recover the measurement information taken downhole. In accordance with an important feature of the invention, a filter is provided for selectively filtering the electronic signals before the demodulation thereof. The filter is provided with a bandpass characteristic having a center frequency which is displaced from the nominal frequency in the directon of the unidirectional decrease or increase of frequency applied when originally modulating the acoustic carrier waves. The center frequency is preferably offset from the nominal carrier frequency by an amount which is a function of the bit rate of the digital information, preferably an amount equal to one-half the bit rate of the digital information. In the preferred embodiment of the invention, the bandpass characteristic of the filter means is skewed in the same direction as the offset.

Apparatus and method for filtering signals in a logging-while-drilling

The disclosure is applicable for use in a logging-while-drilling apparatus for obtaining subsurface measurements during drilling in a fluid-filled borehole. Acoustic carrier waves are generated downhole in the borehole fluid and are PSK modulated in accordance with digital data representative of the measurements. The PSK modulation is obtained by momentarily unidirectionally either decreasing or increasing the frequency of the acoustic carrier signal until either a desired phase lag (for a decrease in frequency) or phase lead (for an increase in frequency) is imparted to the acoustic carrier signal. An uphole receiving subsystem includes transducers for converting the modulated acoustic carrier waves to electronic signals and circuitry for demodulating the electronic signals to recover the measurement information taken downhole. The uphole circuitry includes an improved carrier tracking loop which is useful, for example, in extracting the carrier from the modulated signal, the extracted carrier then being useful in the demodulation operation. The carrier tracking loop has a voltage controlled oscillator having a control terminal and a comparator for generating a control signal by comparing the phase of a signal derived from the received PSK modulated signal to the phase of a signal derived from the output of the voltage controlled oscillator. The control signal is applied to the control terminal of the oscillator. In accordance with an important feature of the invention, the signal applied to the control terminal is compensated as a function of transitions in the received signal to account for the difference between the nominal frequency of the carrier and the average frequency of the received signal. This difference results from the unidirectional nature of the carrier modulation.

Carrier tracking apparatus and method for a logging-while-drilling system

The disclosure relates to an apparatus for receiving a carrier signal modulated with digital symbols, the symbol rate being related to the carrier frequency, such as by a submultiple or a ratio of integers. The invention is an adaptive carrier-aided symbol tracking loop in which signals derived from a symbol-coherent carrier maintain and aid symbol synchronization during periods of no symbol transitions. The invention is particularly applicable to systems wherein the received modulated carrier signal has been transmitted over a noisy transmission path, such as in a logging-while-drilling system. In accordance with the invention there is provided a phase-locked loop which includes a voltage controlled oscillator and an error signal generator for controlling the oscillator. In response to the carrier, a first signal is generated at substantially the symbol rate and, in response to symbol transitions, a second signal is generated which has a phase that depends upon symbol transitions. The error signal generator includes at least one phase comparator which is responsive to a signal derived from the oscillator and to the first and second signals for generating error signals that are applied to the oscillator. If symbol transitions are present, the second signal is used to maintain loop synchronization. If symbol transitions are absent, loop synchronization is maintained by deriving the error signal from the first signal; i.e., a signal at the symbol rate derived from the carrier.

Growing community of inventors

Sarasota, FL, United States of America

William N Waggener, Jr