Alliance Semiconductor Corporation

William N Schnaitter

Spencer H Greene

Andrew D Daniel

A display control circuit controls the outputs of the three video DACs of an RGB monitor on a window-to-window basis to enable the display of motion video and text on the same screen with different brightness and/or tint. A digital overdrive signal, synchronized to the video DAC digital inputs, is used to enable added DAC elements for the pixels in the video windows only. Stored digital instructions determine how many and which added DAC elements are enabled by the overdrive bit(s). By storing different instructions for each of the three video DACs, the circuit may also provide window-dependent tint control. By increasing the number of bits of digital data synchronized to the digital DAC inputs, the stored instructions may be reduced or eliminated. In this case, each of several windows may be set to differing brightness and tint levels. As many different values of brightness and tint may be available as desired by increasing the number of synchronized input enabling bits and the number and strength of the added DAC elements.

Window-dependent brightness/tint control for video digital-to-analog

A switchable current source (10) for video DACs that reduces output transients. The switchable current source (10) includes a current mirror (20) connected to a cascode pair (22) for providing a reference current input and a current output. Connected to the reference current input is reference current generator (14) that includes p-channel transistor Q5 for providing a reference current according to the voltage applied at its gate by voltage source (24). A current switch (16) is connected to the current output and includes p-channel transistor Q6 for providing a path to ground and p-channel transistor Q7 for providing a path to an output node. In response to a decoder input DEC, an enable signal generator (18) outputs an enable signal EN and an inverted enable signal ENI to Q7 and Q6, respectively. The enable signal generator (18) includes a delay path (30 and 34) for both the EN and ENI signals so that during a low-to-high transition of signal DEC, EN is delayed so that ENI turns Q7 on before EN shuts off Q6. During a high-to-low transition of DEC, ENI is delayed so that Q6 is turned on before Q7 is turned off.

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San Ramon, CA, United States of America

William N Schnaitter