Tait Electronics Limited

William Mark Siddall

Mark Vernon Lane

Stephen Bly, Deceased

A control loop () for producing an output signal with a stable nominal frequency is provided. The control loop includes inputs for reference () and oscillator () output signals, a beat frequency generator () for producing a signal with a frequency that is the difference between the oscillator and reference signal frequencies, an ADC () to convert the beat frequency to a digital beat frequency signal, an estimator () for estimating the frequency or phase of the beat signal, an adder () for combining an offset and modulation signal and the estimated frequency or phase of the beat signal into an added signal, and a DAC () for generating an analogue control signal for controlling the oscillator output frequency.

Frequency and/or phase lock loops with beat frequency estimation

A zero intermediate frequency radio receiver that comprises mixing stages, an A to D converter, a digital demodulator, a carrier tracking system and a carrier nulling system is disclosed. The mixing stages receive FM or PM signals and produce analogue in-phase and quadrature baseband signal which are in turn converted to digital baseband signals by the A to D convertor. DC offsets in the baseband signals are removed by high pass filtering prior to demodulation. Tracking enables the baseband signals to be maintained at a centre frequency of substantially zero hertz, while signal strength at this frequency is minimized or mulled before the DC offset filtering. Information which might otherwise be removed by the filtering is thereby retained in the baseband signals, which are relatively less distorted.

Growing community of inventors

Christchurch, New Zealand

William Mark Siddall