Freescale Semiconductor,inc.

Koninklijke Philips Corporation N.v.

Motorola Corporation

William Louis Wilkinson

Kevin D Lucas

Jonathan L Cobb

Kevin Dean Lucas

James Edward Vasek

Cesar M Garza

Robert Elliott Boone

Christophe Couderc

Method and apparatus for designing an integrated circuit by adding a plurality of control points to an integrated circuit wafer design. Each control point has at least one attribute. Then, an integrated circuit wafer is manufactured using the integrated circuit wafer design. A defect on the integrated circuit wafer is then located. The control points are adjusted such that they correspond with the defect.

Method and apparatus for designing and integrated circuit

Photoresist on a wafer is exposed using tiles on a mask that improve flare performance. Features that are not to be exposed on the photoresist correspond to features on the mask. The various features are surrounded by other features that vary and thus affect flare differently. Selected features have tiles added nearby but also far enough away to improve uniformity in the effects of flare on the various features that are intended to be present in the photoresist. The tiles are made either very small in width or partially absorbing so that the tiles are not resolved in the photoresist. Thus the tiles reduce flare but do not alter the desired pattern in the photoresist.

Non-resolving mask tiling method for flare reduction

A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. After the location of design and processing features is determined, subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.

Method for manufacturing a lithographic reticle for transferring an integrated circuit design to a semiconductor wafer

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Georgetown, TX, United States of America

William Louis Wilkinson