Powerwave Technologies, Inc.

Integra Technologies Limited

William Kerr Veitschegger

James Keith Custer

James Hiram Roberson

Melanie Daniels

Scott B Sauer

Michael Hrybenko

Frank Kimmey

Charles M Keen

Joseph Storniolo

Jeremy Monroe

Ken Wong

A semiconductor power device including a base plate, a ring frame disposed over the base plate, a semiconductor power die disposed on the base plate and surrounded by the ring frame, an input lead by way the semiconductor power die receives an input signal, wherein the input lead is disposed over a first portion of the ring frame, and an output lead by way an output signal generated by the semiconductor power die is sent to another device, wherein the output lead is disposed over a second portion of the ring frame. The ring frame may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The ring frame produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.

Semiconductor power device including ring frame for thermal impedance reduction

A semiconductor power device including a base plate, a semiconductor power die disposed on the base plate, an input lead by way the semiconductor power die receives an input signal, an output lead by way an output signal generated by the semiconductor power die is sent to another device, and at least one thermal substrate disposed on the base plate adjacent to the semiconductor power die, wherein a set of electrodes of the semiconductor power die are thermally and electrically coupled to a metallization layer on the thermal substrate. The thermal substrate may be comprised of a relatively high thermal conductivity material, such as beryllium-oxide (Be), silicon-carbide (SiC), diamond, aluminum nitride (AlN), or others. The thermal substrate produces at least one more heat path between the active region of the semiconductor power die and the base plate so as to reduce the effective thermal impedance.

Semiconductor power device including adjacent thermal substrate for thermal impedance reduction

A high power, low loss RF strip transmission line coupling structure is provided. It includes a multi-layer printed circuit board (PCB), a top cover and a bottom cover. The top and bottom covers provide the ground reference for the strip transmission line coupling structure. The PCB is fastened to the top and bottom covers and is used for: creating the center conductor of an air dielectric strip transmission line and edge coupler; providing a means to transition from microstrip to air dielectric strip transmission line; supporting the air dielectric strip transmission line; routing of other signals; and passing ground to the top and bottom covers. To create an air dielectric strip transmission line, the PCB material is adequately removed to effectively form a rectangular bar of dielectric and metal layers. This rectangular bar is plated along the edges where the PCB material was removed to ensure that the top and bottom PCB metal layers are at the same potential.

Low loss, high power air dielectric stripline edge coupling structure

A method allowing for the inexpensive automated construction of interconnections between circuit boards is provided. According to the present invention, printed circuit pins are inserted in a circuit board from the top (component side). Provided the heads of the pins are thin enough to lie beneath a solder stencil, the pins may be pre-installed on the circuit board and solder applied to the pins at the same time solder is applied to other regions of the board. Thus, known surface mount techniques may be employed to form solder connections between the pins and conductive traces on the circuit board, which facilitates the automation of the previously manual operation of soldering the printed circuit pins separately.

Method for assembling a circuit board apparatus with pin connectors

A printed circuit board (PCB) assembly comprising a PCB having a top circuitry layer and a bottom layer with a hole through the PCB, a component, and a pallet. The printed circuit board manufactured by a method including forming a hole through the top circuitry layer and the bottom layer, attaching the bottom layer to a pallet, placing the component in the hole, and soldering the component to the top circuitry layer and to the pallet.

Method of mounting a component in an edge-plated hole formed in a printed circuit board

An electronics assembly incorporating an interconnect includes a conductive gasket disposed between a first printed circuit board and a second printed circuit board. The gasket surrounds, and thereby shields, the interconnect while providing an RF ground connection between the two boards with a controlled RF impedance. The second printed circuit board may serve as a connector board for a plurality of modules, or other printed circuit boards, to be coupled thereto. Each module is individually covered with a separate lid. Methods for manufacturing and assembling structures according to the invention are also provided.

RF electronics assembly with shielded interconnect

For use with RF circuitry in which a DC bias circuit provides bias voltage is provided to impedance-matched circuitry, a structure is provided, in which a dielectric member, having a high dielectric constant, is selectively placed adjacent to a bias feed line coupled between the DC bias circuit and the remainder of the circuitry, to maintain high RF impedance while reducing impedance at lower frequencies. The invention has particular applicability to RF amplifiers, to be used for amplifying modulated carriers, such as video signals made up of an RF carrier and a lower-frequency modulation. Where the carrier has a predetermined wavelength, the physical length of the bias feed line and the dielectric constant of the dielectric member are chosen such that an effective length of the bias feed line is a quarter of the wavelength of the carrier.

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Folsom, CA, United States of America

William Kerr Veitschegger