Compaq Computer Corporation, Inc.

Hewlett Packard Enterprise Development LP

Hewlett-packard Development Company, L.p.

William J Walker

Dale J Mayer

Michael L Witkowski

Gary B Kotzur

Patricia E Hareski

Mohammad A Khan

Phillip M Jones

Gregory T Chandler

Kirk D Roller

Kevin B Leigh

George D Megason

Robert A Lester

Melvin K Benedict

John Edward Larson

Alan L Goodrum

Andrew Christopher Walton

Kenneth A Jansen

John MacLaren

David W Engler

Jens K Ramsey

Sai Rahul Chalamalasetti

Naysen J Robertson

Paras A Shah

Paul B Rawlins

Michael T Gill

James K Yu

Rama Prasad Atluri

Eugene E Freeman

Roger Richter

James Andre

Andy Olsen

Vasileios Balabanos

Andrew D Olsen

In some examples, an apparatus includes a management controller for use in a computer system having a processing resource for executing an operating system (OS) of the computer system, the management controller being separate from the processing resource and to perform, based on operation of the management controller within a cryptographic boundary, management of components of the computer system, the management of components comprising power control of the computer system. The management controller is to receive sensor data, perform facial recognition based on the sensor data, and determine whether to initiate a security action responsive to the facial recognition.

Facial recognition based security by a management controller

Systems and methods are provided for overcurrent protection in a power supply. In some embodiments, the method comprises determining a load of the power supply; selecting an over-current limit, among a plurality of the over-current limits, based on the measured load of the power supply; and responsive to an input current of the power supply, an output current of the power supply, or both exceeding the identified over-current limit, taking one or more overcurrent protection measures.

Variable overcurrent protection for power supplies

An example power supply for supplying electrical power to an electronic device includes converters to convert an input power signal into an output power signal, and a controller. The controller is to periodically measure an input current being drawn from the input power signal, periodically determine a moving average of the input current, and periodically compare the moving average of the input current to the present input current. The controller identifies that a fault may have occurred in response to the present input current exceeding the moving average by a threshold amount. The controller shuts down supply of power to the electronic device responsive to identifying the fault.

Fault detection based on comparing input current and moving average input current

Securing data exchanged between components such as hardware sub-systems of a computing device (e.g., internal communications) during a request-response cycle is desirable. In some implementations, methods and systems as disclosed to secure computing devices against attackers attempting to take physical control of a computer system (or portion thereof) to compromise the system or steal data managed by the computer system. In one example, data transmission request from sender to a receiver may be identified and associated with a unique identifier to individually identify the data transmission request (e.g., a request internal to the computer system). The request may then be provided to the receiver and a later response may be identified and validated prior to returning the response data to the requestor. The validation may include ensuring an associated tag (e.g., unique identifier) is provided with the response to tie it to the request for which the response is being sent.

Security for active data request streams

Software intrusion protection systems to prevent remote access to sensitive data are very prevalent. In some cases, additional physical access protection may also be desired. By preventing physical access to a system an intruder may not be able to physically 'steal' component parts of the system and then obtain their contents (or design criteria) at a remote site (e.g., after the physical theft). Monitors are provided to detect potential access to a secure computer system and identify if inappropriate access to the secure computer system is obtained (or is imminent). In a case where unauthorized access is predicted, warnings and alerts may be sent prior to an actual breach. Upon determination that a breach may be likely to occur, techniques to protect data (e.g., erasure, destruction, etc.) and component parts may be initiated. Sensors monitor internal and external physical environmental conditions to assist in detection of intrusion.

Intrustion detection and notification device

A predictive power factor control system for an electronic system which includes a power supply providing power at a power supply output to a load having at least one component operable in a plurality of operating states. A load controller selectively determines the operating state of the load. A power factor control (PFC) circuit is coupled to the power supply and cooperates with the power supply to maintain the power factor of the power supply output within desired ranges. The load controller may provide the PFC circuit with a pending load change notification prior to a pending change in the operating state of the controlled load or prior to the activation of additional loads on the power supply output, enabling the PFC circuit to predictively adjust operation to avoid or minimize power factor fluctuations arising from changes in operating state of the load or activation of an additional loads.

Predictive power factor control for electronic systems

An example power supply for supplying electrical power to an electronic device includes an AC to DC converter, power factor correction (PFC) circuitry, and a controller. The AC to DC converter is configured to convert an input AC power signal into a DC power signal. The PFC circuitry is configured to correct a power factor of the DC power signal. The controller is configured to monitor an amount of correction (&#x3c6;) being applied to the DC power signal by the PFC circuitry and to shut down supply of power to the electronic device in response to &#x3c6; being within a first threshold of zero degrees for a second threshold amount of time.

Fault detection based on amount of PFC correction

A module connectivity device includes a stationary pivot plenum, a number of rocker-arm assemblies movably coupled to the stationary pivot plenum in which the rocker-arm assemblies move between an open position and a closed position, and a number of module connectors movably coupled to the rocker-arm assemblies, in which the module connectors move between a disengaged position and an engaged position with respect to the connectors on system modules. A module connectivity system includes a number of rocker-arm assemblies and a number of module connectors movably coupled to the number of rocker-arm assemblies. The system also includes a module connectivity manager to manage the connectivity of the module connectors.

Module connectivity device

Activation rates of memory locations associated with memory addresses are monitored. The activation rates of the memory locations associated with the memory addresses are regulated. The regulating of the activation rates of the memory locations associated with the memory addresses includes selectively updating a cache with the memory addresses based on the activation rates.

Regulating memory activation rates

A system comprises a plurality of nodes coupled together via a switching device. Each node comprises a processor coupled to a memory. Migration logic in the switching device is configured to migrate segments of each memory to the switching device.

Method and system for migrating memory segments

A network communication device including port control circuitry for controlling packet flow between the ports of the device, where the port control circuitry includes a port manager that directs packets between the ports and port bonding circuitry that bonds two or more of the ports into a bonded port set. For each packet to be sent via the bonded port set, the port bonding circuitry selects one of the bonded ports for transmitting the packet. More than one bonded port set may be defined in a given communication device, and each bonded port set may include from two ports up to all the ports of the device, as long as each port is included in only one bonded port set. One or more port bonding registers are provided to identify which of the plurality of ports are bonded in each bonded port set. In one embodiment, the bonded ports are selected on a packet by packet basis so as to achieve a relatively even distribution of packets sent by each bonded port. In an alternative embodiment bonded ports are assigned to packet source identifiers so as to achieve a relatively even distribution of source identifiers among the bonded ports. If bonded ports are assigned to particular source identifiers, then the traffic is preferably monitored and the assignments are periodically adjusted to achieve even distribution of packet flow on the bonded link. The bonded ports may have different bandwidths, in which case traffic is distributed on a proportionate basis.

Network communication device including bonded ports for increased bandwidth

Method and apparatus for improving processor performance. In some embodiments, processing speed may be improved by reusing data stored in a buffer during an initial request by subsequent requests. Assignment of temporary storage buffers in a controller may be made to allow for the potential for reuse of the data. Further, a hot buffer may be designated to allow for reuse of the data stored in the hot buffer. On subsequent requests, data stored in the hot buffer may be sent to a requesting device without re-retrieving the data from memory.

Technique for improving processor performance

A memory controller retrieves data from memory before such data has actually been requested by an electrical device. The RAM controller may store such data into a prefetch buffer.

Methods and apparatus used to retrieve data from memory into a RAM controller before such data is requested

A system and technique for detecting data errors in a memory device. More specifically, data errors in a memory device are detected by initiating an internal READ command or cleansing operation from a set of logic which is internal to the memory system in which the memory devices reside. Rather than relying on a READ command to be issued from an external device, via a host controller, the cleansing logic initiates a cleansing routine in response to an event such as an operator instruction or a periodic schedule. By implementing the cleansing operation, the system does not rely on external READ commands to verify data integrity. Further, a monitoring device is coupled between the cleansing logic and a memory scheduler. The monitoring device provides a feed back mechanism from which to vary the frequency of certain memory requests such as the cleansing and scrubbing operations. The cleansing routine may rely on typical ECC error logging mechanisms and may be used in a RAID memory architecture. Further, the cleansing routine may be used in conjunction with other error logging and correction logic, as well as scrubbing logic.

Growing community of inventors

Harris County, TX, United States of America

William J Walker