Ikanos Communications, Inc.

Globespan Virata Corporation

Globespan, Inc.

William J Santulli

Kevin Dean Fisher

Massimo Sorbara

Daniel Amrany

Clark B Woodworth

Yue-Peng Zheng

Wenwei Pan

Lazslo Arato

Kachung Wong

DSL backchannel data and/or information is transported upstream in a vectored, bonded line DSL system. Backchannel data (e.g., error samples or the like from downstream-end DSL equipment) is encapsulated/packetized using Layer 2 encapsulation. Upstream user data is packetized into Ethernet packets or the like. The backchannel data and upstream user data are combined and the combined data transmitted to an upstream-end DSL apparatus, such as an access node. The combined data are separated in the upstream-end DSL apparatus so that the upstream user data can be processed further. The Layer 2 encapsulated backchannel data is decapsulated and then routed to a vectoring control entity or the like for use in operating the DSL system, for example in mitigating FEXT crosstalk in the DSL system's operation.

Method and apparatus for DSL back-channel communication

A physical interface unit and method are disclosed which are configured to receive a data stream which may use any one of a number of data communications protocols, and to transmit the same data stream using another one of the same number of data communications protocols. The physical interface unit is advantageously designed to operate in conjunction with a processor circuit to translate a data stream from a first data protocol to a second data protocol. The physical interface unit includes a first serial interface, a first asynchronous transfer mode (ATM) interface, and a first parallel interface. The physical interface also includes a second serial interface, a second ATM interface, and a second parallel interface. The first serial, ATM, and parallel interfaces are electrically coupled to a first FIFO circuit which interfaces with the processor circuit. Likewise, the second serial, ATM, and parallel interfaces are electrically coupled to a second FIFO circuit which interfaces with the processor circuit. One of the first serial, ATM, and parallel interfaces and one of the second serial, ATM, and parallel interfaces are enabled by a selection circuit. A bi-directional data stream using a first protocol is received from and transmitted to a first data endpoint by the enabled first interface and provided to the processor circuit for protocol translation. The same data stream is transmitted to and received from a second data endpoint from the processor circuit via the enabled second interface.

Multiple protocol interface and method for use in a communications system

Disclosed is a configurable Reed-Solomon encoder and method. The configurable Reed-Solomon encoder comprises a multiplexed multiplier-accumulator, a parallel latch bank operatively coupled to the multiplexed multiplier-accumulator, a data/parity multiplexer coupled to the parallel latch bank, and an encoder controller operatively coupled to, and controlling the operation of, the multiplexed multiplier-accumulator, the parallel latch bank, and the data/parity multiplexer. The configurable Reed-Solomon encoder is preferably implemented in an application specific integrated circuit (ASIC), although it may be implemented in software executed by a high-speed digital signal processor, etc.

Configurable encoder and method for generating a Reed-Solomon codeword

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Tinton Falls, NJ, United States of America

William J Santulli