Motorola Corporation

Freescale Semiconductor,inc.

Future Wei Technologies, Inc.

Other

Huawei Technologies Co., Limited

William J Roeckner

Pallab Midya

Lawrence Edwin Connell

Terrie McCain

Matthew Richard Miller

Neal W Hollenbeck

Kenneth R Haddad

Timothy T Rueger

Poojan Wagh

Patrick Lee Rakers

Kenneth Allen Paitl

Walter S Czarnocki

Gregory J Buchwald

Mark Joseph Callicotte

John K Grosspietsch

Anthony R Schooler

Daniel A Mavencamp

Siamak Abedinpour

Bradley C Stewart

William John Rinderknecht

David D Kang

Cesar Pascual

Steven W Bergstedt

Wenrong Ying

Rakers L Patrick

Theresa Paulo

Timothy Rueger

Walter Czarnocki

The present disclosure relates to single-ended-to-differential amplifiers and radio frequency receivers. One example single-ended-to-differential amplifier includes a first inverting amplifier, a second inverting amplifier, and a third inverting amplifier. Both an input end of the first inverting amplifier and an input end of the second inverting amplifier are coupled to an input end of the single-ended-to-differential amplifier, an output end of the first inverting amplifier is coupled to an input end of the third inverting amplifier, an output end of the second inverting amplifier is coupled to a first output end of the single-ended-to-differential amplifier, and an output end of the third inverting amplifier is coupled to a second output end of the single-ended-to-differential amplifier. An impedance element is coupled between the input end of the first inverting amplifier and the output end of the first inverting amplifier.

Single-ended-to-differential amplifier and radio frequency receiver

An apparatus comprises a plurality of selectable gain stages connected in parallel between a first bias voltage and ground, wherein each selectable gain stage comprises an amplification portion and a current steering portion, and wherein the current steering portion comprises a first selectable signal path connected between an output of the amplification portion and a signal output terminal, and a second selectable signal path connected between the output of the amplification portion and ground through a shunt device.

Programmable gain amplifier apparatus and method

An apparatus comprising an amplifier comprising an input, a capacitor having a capacitor first side and a capacitor second side, wherein the capacitor first side is coupled to the input, a switch having a switch first side and a switch second side, wherein the switch first side is coupled to the capacitor second side, and a transistor having a transistor gate, and a transistor source, wherein the transistor gate is coupled to the input and the capacitor first side, wherein the transistor source is coupled to the switch second side and wherein the switch is positioned directly between the capacitor second side and the transistor source.

Tunable radio frequency low noise amplifier

A circuit comprising a transconductor amplifier, and a load connected to the transconductor amplifier, wherein the load comprises a load transistor that is passively biased.

Radio frequency low noise amplifier load circuit

A transceiver mitigates signal leakage into a receive path from a transmit path. A subtraction circuit determines a difference between a receive signal and a compensation signal to produce a compensated receive signal prior to demodulation by a demodulator. An equalizer both amplitude adjusts and phase adjusts orthogonal baseband transmit signals based on the difference from the subtraction circuit to produce the compensation signal. A digital tuning circuit determines at least one amplitude adjust coefficient to be used by the equalizer. The equalizer can have a polarity switch or a variable attenuator or a variable delay.

Transmitter signal injection compensation

A switching power converter converts an input DC voltage to an output DC voltage using a switch to selectively connect an input DC voltage energy source. A switching controller controls the switch. A pulse width modulation centering signal is generated by a spread spectrum clock signal generator. An error amplifier of the switching controller generates an analog error signal based on a switching voltage measured after the switching of the switching power converter, the output voltage of the switching power converter, the pulse width modulation centering signal and a reference. A pulse width modulated signal generator generates the pulse width modulation signal to control the switch of the switching power converter based on the pulse width modulation centering signal and the analog error signal.

DC to DC switching power converter controller using spread spectrum PWM

A switching audio amplifier circuit drives a switching audio amplifier stage using a digital PWM signal from an audio source. A PWM duty ratio modifier modifies an edge timing of the digital PWM signal to produce a modified digital PWM signal. A mode switch switches between the digital PWM signal and the modified digital PWM signal in a way that masks audible noise such as clicks and pops at power-up and power-down of the switching audio amplifier. An integrating error amplifier compares a difference between the digital PWM signal and an amplified PWM signal and integrates the difference to control the edge timing modified by the PWM duty ratio modifier. A mode controller can apply an offset signal to the integrating error amplifier and can control the switching of the mode switch.

Quiet power up and power down of closed loop digital PWM modulators

A switching amplifier drives a load or audio transducer. A digital integral noise shaping circuit converts a digital input such as audio content to an output digital pulse width modulated signal using an integrator. The integrator integrates the digital input, a variable frequency reference pulse width modulated signal and an inverse of the output digital pulse width modulated signal. A half bridge amplifier receives the output digital pulse width modulated signal and drives the load or audio transducer. A variable frequency generator generates the variable frequency reference pulse width modulated signal with an approximately equal duty ratio or alternatively varies the variable frequency pulse width modulated signal above and below about a fifty percent duty ratio.

Digital pulse width modulation for half bridge amplifiers

A circuit includes a variable frequency generator circuit and a quantization circuit. The variable frequency generator circuit provides a discontinuous switching frequency signal. The variable frequency generator circuit varies the discontinuous switching frequency signal between a first and second frequency while avoiding at least one frequency band between the first and second frequency. The quantization circuit provides a plurality discrete switching signals each separated by a second frequency band that vary in accordance with the discontinuous switching frequency signal, wherein the avoided frequency band of the discontinuous switching frequency signal is greater than the second frequency band.

Spread spectrum pulse width modulation method and apparatus

A switching amplifier includes a power stage, a low pass filter, a combining circuit, and a feedback correction circuit. The power stage has an input terminal and an output terminal. The low pass filter has an input terminal coupled to the output terminal of the power stage, and an output terminal for providing a filtered pulse width modulated signal. The combining circuit has a first input terminal coupled to the output terminal of the power stage, a second input terminal coupled to the output terminal of the low pass filter, and an output terminal. The feedback correction circuit has a first input terminal for receiving a reference pulse width modulated signal, a second input terminal coupled to the output terminal of the combining circuit, and an output terminal coupled to the input terminal of the power stage.

Digital pulse width modulated feedback system for a switching amplifier and method therefor

An edge seal structure and fabrication method are described. The edge seal structure includes a high impedance substrate containing a base material and a grounded floating edge seal that is on the substrate but is isolated from the base material. The edge seal contacts a first doped well in the substrate that has the same conductivity type as and is more heavily doped than the base material. The first doped well is in a second doped well that has a different conductivity type than the first doped well. The first and second doped wells and the base material form back-to-back series connected diodes. The wells are effectively connected to power and ground such that the diodes are reverse-biased. The edge seal is formed by a stack of conductive layers, at least some of which are surrounded by a stack of insulating layers.

Edge seal for improving integrated circuit noise isolation

A closed loop audio amplifier system and method of powering up/down the system without producing audible artifacts are provided. During power up, a prebias voltage is provided to each output connected to a speaker to increase the voltage to a nominal output level. High impedance switches are then driven at a 50% duty cycle. Feedback from the output is supplied to a servo, which is enabled to fine tune the output voltage. Low impedance switches are then driven at a 50% duty cycle at a quarter cycle timing. The order of the feedback loop depends on which of the high or low impedance switches are driven. The prebias voltage is then removed before audio signals to be amplified are supplied to the system. Timing of driving of the switches is programmable. To power down, essentially the reverse sequence is provided.

Quiet power up and power down of a digital audio amplifier

An audio amplifier includes a digital signal processor (DSP) that contains a noise shaping quantizer having an integrating error amplifier. The integrating error amplifier contains integrators connected in a feedback loop, a summer supplied with an output of each of the integrators, and a saturation function module producing a saturation function. A multiplier is disposed between each pair of adjacent integrators. The multiplier receives a signal from one of the adjacent integrators and the saturation function and supplies a signal to the other of the adjacent integrators. The saturation function decreases the effect of all of the integrators except an integrator to which an input signal to the integrating amplifier is supplied using an input signal to and/or an output signal from the noise shaping quantizer. This permits the duty ratio of the output signal from the noise shaping quantizer to extend from 0% to 100%.

Digital saturation handling in integral noise shaping of pulse width modulation

Systems and methods are described for full bridge integral noise shaping for quantization of pulse width modulated signals. A method for full bridge integral noise shaping comprises: receiving a first and a second reference PWM signal; summing the first and second reference PWM signals with a quantization error correction; quantizing the sum into a first and a second output PWM signal; differentially integrating the first and second reference PWM signals and the first and second output PWM signals according to a full bridge integral noise shaping algorithm to obtain the quantization error correction. An apparatus for performing a full bridge integral noise shaping quantization of a pulse modulated signal, includes: a single-ended to differential conversion circuit; and a full bridge INS quantizer circuit, coupled to the single-ended to differential conversion circuit.

Growing community of inventors

Algonquin, IL, United States of America

William J Roeckner