Micron Technology Incorporated

William J Baggenstoss

William Arthur Stanton

Christophe Pierrat

James E Burdorf

Byron Neville Burgess

Erik R Byers

Pary Baluswamy

A pixel cell having a photosensor within a silicon substrate; and an oxide layer provided over the photosensor, the oxide layer having a grated interface with said silicon substrate, and a method of fabricating the pixel cell having a grated interface.

Method of forming pixel cell having a grated interface

Pixel cell having a grated interface

Reticles having reticle patterns suitable for reducing edge of array effects are provided. The reticle patterns have unresolvable patterns formed in the periphery areas of the reticle patterns. The unresolvable patterns are non-transparent with respect to patterning radiation. Systems incorporating the reticles are also provided. Additionally, methods of forming and using the reticles are provided.

Reticles and methods of forming and using the same

A semiconductor pattern mask that might otherwise exhibit three-fold symmetry, which could give rise to distorted semiconductor features in the presence of three-leaf aberration in the optical system used to expose a semiconductor wafer through the mask, is altered to break up the three-fold symmetry without altering the semiconductor features that are formed. This accomplished by adding features to the mask that break up the symmetry. One way of achieving that result is to make the added features of 'sub-resolution' size that do not produce features on the exposed wafer. Another way of achieving that result is to change existing features that do form structures in such a way (e.g., with optical elements) that changes the relative phase, amplitude or other characteristic of light transmitted through those features.

Pattern mask with features to minimize the effect of aberrations

Reticles having reticle patterns suitable for reducing edge of array effects are provided. The reticle patterns may have sub-resolution patterns or a transmissive block fill formed in the periphery areas of the reticle patterns. Systems incorporating the reticles are also provided. Additionally, methods of forming and using the reticles are provided.

A semiconductor pattern mask that might otherwise exhibit three-fold symmetry, which could give rise to distorted semiconductor features in the presence of three-leaf aberration in the optical system used to expose a semiconductor wafer through the mask, is altered to break up the three-fold symmetry without altering the semiconductor features that are formed. This accomplished by adding features to the mask that break up the symmetry. One way of achieving that result is to make the added features of &ldquo;sub-resolution&rdquo; size that do not produce features on the exposed wafer. Another way of achieving that result is to change existing features that do form structures in such a way (e.g., with optical elements) that changes the relative phase, amplitude or other characteristic of light transmitted through those features.

A computer implemented method that uses a full integrated circuit (IC) chip design, to be printed by an attenuated phase shift mask, as an input parameter. Each feature environment within the input full IC chip design is individually simulated to determine how the features within the environment would be printed from the mask created according to the input design. The simulation of each environment also determines the extent and locations of unwanted side lobes that would also be printed from the mask. Once the side lobes are determined, auxiliary features are incorporated into the input design so that the auxiliary features will become transparent openings within a mask created in accordance with the modified input design. Each auxiliary feature opening is placed at a side lobe location and is designed to eliminate the side lobe by passing radiant energy that is 180 degrees out of phase with the radiant energy of the side lobe. Thus, each auxiliary feature serves as a side lobe inhibitor when incorporated into the mask. The modified input design undergoes a proximity correction to ensure that features of each environment print as originally desired. Once corrected, each environment is simulated again to verify that its features will print as originally desired and without side lobes. Once verified, the modified input design is used to create an attenuated phase shift mask that prints the desired features, but does not print side lobes.

Method to eliminate side lobe printing of attenuated phase shift

Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.

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Boise, ID, United States of America

William J Baggenstoss