Stratus Computer, Inc.

Avago Technologies International Sales Pte. Limited

Avago Technologies General IP (singapore) Pte. Ltd.

William Irving Leavitt

James B Williams

Carl John Lindeborg

David James Duckman

Shawn Adam Clayton

James Winston Smart

Maria Clara Gutierrez

John Leland Wood

Charles J Horvath

Alexander Nicolson, Iv

Mark D Tetreault

Gregory M Green

Peter C Churchill

John M Chaves

David R Barbera

Jeffrey S Somers

Shawn A Clayton

Conrad R Clemson

A system for enabling input/out virtualization for a device is disclosed. In one embodiment the system includes a plurality of host CPUs; a multi-root switch connected to each of the plurality of host CPUs via respective buses; and an inline PCI virtualizing device connected to the multi-root switch via a front-side bus and the device via a back-side bus, the inline PCI virtualizing device including a plurality sets of registers, each of the plurality sets of registers accessible by a corresponding host CPU of the plurality of host CPUs and implementing functionalities of the device.

Inline PCI-IOV adapter

A system for enabling input/out virtualization for a device is disclosed. In one embodiment, the system includes a plurality of host CPUs; a multi-root switch connected to each of the plurality of host CPUs via respective buses; and an inline PCI virtualizing device connected to the multi-root switch via a front-side bus and the device via a back-side bus, the inline PCI virtualizing device including a plurality sets of registers, each of the plurality sets of registers accessible by a corresponding host CPU of the plurality of host CPUs and implementing functionalities of the device.

A digital data processing device includes a bus for transmitting signals (e.g., data and/or address information) between plural functional units (e.g., a central processing unit and a peripheral controller). A first such unit includes first and second processing sections that concurrently apply to the bus complementary portions of like information signals (e.g., longwords containing data). A fault detection element reads the resultant signal from the bus and compares it with at least portions of the corresponding signals originally generated by the processing sections themselves. If there is discrepancy, the fault-detector signals a fault, e.g., causing the unit to be taken off-line. By use of a redundant unit, processing can continue for fault-tolerant operation.

Digital data processing methods and apparatus for fault detection and

A fault-isolating digital data processing apparatus includes plural functional units that are interconnected for point-to-point communications by a plurality of buses. The functional units monitor the buses to which they are attached and signal the other units in the event there are bus communication errors. The functional units can simultaneously enter into an error isolation phase, e.g., in response to a bus error signaled by one of the units. During this phase, each unit transmits test data (e.g., predetermined patterns of O's and 1's) onto at least one of its attached buses. The functional units continue to monitor the buses and to signal bus errors while the test data is being transmitted. In addition to signaling bus errors, the functional units can signal unit-level (or 'board') faults when they detect fault in their own operation. To this end, each unit includes error isolation functionality that signals a fault based on (i) whether that unit signaled a loopback error with respect to its own operation; (ii) whether that unit or another unit signaled a bus error during the error isolation phase; and/or (iii) whether any other functional unit signaled that it was faulty during the error isolation phase.

Digital data processing methods and apparatus for fault isolation

A bus device (10) the communicates with other bus devices (12, 13) on a communication channel (14) that includes a plurality of duplicated information buses (16, 17) selectively assumes bus-selection states in which it uses information from one or the other of the buses (16, 17). It also monitors the buses (16, 17) for errors in the information that the buses (16, 17) carry, and it broadcasts an error signal over other lines (18) of the communications channel (14) in response to detection of such an error, but only if an error occurs in information on the bus that its current bus-selection state designates. On the other hand, when an error-broadcast signal indicating an error on either bus in the information transmitted by that device (10) appears on the bus, that bus device (10) retransmits the information, regardless of that device's current bus-selection state. Inconsistent operation phasing among bus devices that have assumed different bus-selection states is thereby avoided.

Fault-tolerant computer system employing an improved error-broadcast

Growing community of inventors

Lexington, MA, United States of America

William Irving Leavitt