Digital Equipment Corporation

William H Angell

Peter J Rado

Srirama S Durvasula

An initialization circuit for a dynamic memory element in a data processing system. The dynamic memory element comprises plural storage modules and a refreshing cycle counter that addresses individual storage locations in said modules in sequence. Address decoding circuitry normally enables a transfer with only one storage module at a time. During initialization, however, the initialization circuit forces the address decoding circuitry to identify all storage modules simultaneously and forces a data circuit to transmit a known value to the dynamic memory. All modules are thereby loaded in parallel with corresponding storage locations in each module being selected by the refreshing cycle counter.

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Concord, MA, United States of America

William H Angell