Hewlett-packard Development Company, L.p.

Hewlett-packard Company

William Gordon Hooper, Iii

James Lawrence White

Timothy M Anderson

A method and system for enhancing the reliability of a solid-state storage device based on electronic memory. The electronic memory is organized into low-address and high-address spare table regions, low-address and high-address spare page regions, and a large data page region. Data blocks within the memory are specified by accessing devices using a logical data block address, including a page index and a data block index. The page index selects a particular spare table, a particular spare page, and a particular data page. The data block index selects a spare table element within the spare table, and a data block within a data page. When an LDBA has been remapped, information in a corresponding spare table element is used to locate a physical block within a spare page.

Method and system for data block sparing in a solid-state storage device

A system for selectively routing data within a fiber channel arbitrated loop, including an intra-loop router configured to be coupled between a first segment and a second segment of the fiber channel arbitrated loop. The intra-loop router includes a router controller configured to be coupled with the first and second segments, and a processing system coupled with the router controller. The processing system is configured to receive fiber channel frames and cause those frames to be re-transmitted onto a selected one of the first and second segments of the fiber channel arbitrated loop.

Segmented fiber channel arbitrated loop and intra-loop routing system

A method and system for facilitating reliable and fault-tolerant operation of a multi-peripheral-device enclosure for use in high-availability computer systems by redundant interconnection of redundant processors within the multi-peripheral-device enclosure. The redundant interconnection removes a potential single point of failure, and allows the redundant processors to share in control of other components within the multi-peripheral-device enclosure. The multi-peripheral-device enclosure can recover from failure of all but one of the redundant processors, as well as failure in all but one of the redundant busses used to interconnect the two processors.

Growing community of inventors

Orangevale, CA, United States of America

William Gordon Hooper, Iii