Integrated Device Technology, Inc.

William G Baker

Timothy Gillespie

An input buffer circuit includes a voltage limiting circuit and a protection circuit coupled between a pull-up component and a pull-down component of a level detecting circuit. The voltage limiting circuit receives an input signal at a first voltage range and limits the input signal to a safe voltage range, the first voltage range being between an electrical ground and a first supply voltage level, and the safe voltage range being between the electrical ground and a second supply voltage level. The level detecting circuit has a pull-up component receiving the input signal directly from the input terminal and a pull-down component receiving the safe voltage range from the voltage limiting circuit. The level detecting circuit transitions the input signal from the first voltage range to the input signal at the second voltage range. The protection circuit is coupled in series between the pull-up component and the pull-down component so as to protect the level detecting circuit from gate oxide overstress.

High voltage input buffer

A frequency synthesizer IC is disclosed that includes a variable delay circuit, a fractional-N phase locked loop circuit, and a feedback loop. The variable delay circuit is electrically coupled to the input of the fractional-N phase locked loop circuit. The feedback loop couples a first control signal from the fractional-N phase locked loop to the variable delay circuit. The variable delay circuit generates a reference signal that has a phase delay that varies in accordance with a second control signal and a first control signal. The fractional-N phase locked loop circuit is operable upon receiving the reference signal to generate the first control signal, the second control signal, and an output signal having a frequency that is a non-integer product of the reference signal.

Low jitter frequency synthesizer

An auto voltage sense circuit uses voltage controlled current sources to generate a desired reference voltage level that closely tracks the variations and changes of a first voltage level and a second voltage level. The auto voltage sensing circuit includes a first voltage controlled current source operable to receive the first voltage level to generate a reference current that is proportional to the first voltage level. The auto voltage sensing circuit also includes a second voltage controlled current source operable to receive the second voltage level and the reference voltage to generate an output current that is proportional to the difference between the second voltage level and the reference voltage. The reference voltage causes the output current to be approximately equal to the reference current so as to generate a reference voltage that is proportional to the difference between the second voltage level and the first voltage level.

Voltage sensing circuit

A high speed MOSFET output driver is disclosed that includes a voltage level shifter stage operable to transition an input signal at a first voltage level to an output signal at a second voltage level, an output stage operable to drive high voltage output load, and a hot inverter, biased between the second voltage level and the bias voltage such that the voltage gain of the output signal is increased and at the same time the minimum voltage level of the output signal introduced to the output stage is decreased, improving the control and the transition time of the output signal and allowing all components of the high speed MOSFET output driver of the present invention to be fabricated using a single thin gate oxide process.

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North Parramatta, Australia

William G Baker