Commodore Business Machines, Inc.

William F Gardei

Charles E Hauck, Jr

A latch transfers fetched opcode to PLA for execution at the earliest opportunity following execution of a prior single cycle opcode.

System for accelerating execution of program instructions by a

A fast logic gate wherein the gate output assumes a first binary state when two or more of the gate inputs assume the same predetermined binary states and wherein the gate output assumes a second binary state otherwise. The delay in propagating the gate output based on a transition at a predetermined one of the gate inputs is relatively small. In a preferred application, the gate is utilized in a microprocessor ALU, more particularly, the portion of each adder bit which generates the carry output, and the predetermined gate input is the carry input of the adder bit. The microprocessor can therefore execute instructions which involve addition or subtraction operations, such as relatively addressing instructions, much more quickily.

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Downingtown, PA, United States of America

William F Gardei