Other

Advanced Micro Devices Corporation

Xilinx, Inc.

William Evan Jones, Iii

William Louie Walker

Thomas Casey Hill

Marius Evers

Douglas Benson Hunt

Pongstorn Maidee

Ashok Tirupathy Venkatachar

Donald W McCauley

Scott Thomas Bingham

Aparna Thyagarajan

Willard E Jones

Deborah S Jones

Richard Carlson

Raymond M Porcelli

John C Braun

Angelo Wong

Lynn R Bowers

The disclosed device includes a processor and an interconnect connecting the processor to a memory. The interconnect includes an interconnect agent that can forward memory requests from the processor to the memory and receive requested data returned by the memory. The requested data can include information for a next memory request such that the interconnect agent can send, to the memory, a speculative memory request using information for the next memory request that was received in response to the memory request. Various other methods, systems, and computer-readable media are also disclosed.

Remote acceleration for data dependent address calculation

A method, system, and processing system for pre-fetching data is disclosed. The method, system, and processing system includes data cache region prefetch circuitry for detecting a first access by a first instruction at a first instruction address to a first memory portion, detecting a first non-sequential access pattern to a set of addresses in the first memory portion, and in response to a miss by a second instruction at the first instruction address, and in response to the non-sequential access pattern occurring, pre-fetching data according to the first non-sequential access pattern.

Data cache region prefetcher

An exercise handle, comprising: a housing having a slot extending from a first end to a second end and an internal cavity; a sleeve having a slot extending from a first end to a second end; and a retainer having a slot extending from a first end to a second end; wherein the retainer is secured to the sleeve wherein the slots align and an internal cavity is formed and the retainer and sleeve assembly is inserted into the internal cavity of the housing and the sleeve retainer assembly is able to rotate within the housing so that the housing slot is able to align with the sleeve retainer assembly slot.

Exercise grip

A processing system includes an interconnect fabric coupleable to a local memory and at least one compute cluster coupled to the interconnect fabric. The compute cluster includes a processor core and a cache hierarchy. The cache hierarchy has a plurality of caches and a throttle controller configured to throttle a rate of memory requests issuable by the processor core based on at least one of an access latency metric and a prefetch accuracy metric. The access latency metric represents an average access latency for memory requests for the processor core and the prefetch accuracy metric represents an accuracy of a prefetcher of a cache of the cache hierarchy.

Memory request throttling to constrain memory bandwidth utilization

Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.

Instruction cache prefetch throttle

A processing system rinses, from a cache, those cache lines that share the same memory page as a cache line identified for eviction. A cache controller of the processing system identifies a cache line as scheduled for eviction. In response, the cache controller, identifies additional 'dirty victim' cache lines (cache lines that have been modified at the cache and not yet written back to memory) that are associated with the same memory page, and writes each of the identified cache lines to the same memory page. By writing each of the dirty victim cache lines associated with the memory page to memory, the processing system reduces memory overhead and improves processing efficiency.

Rinsing cache lines from a common memory page to memory

The electronically regulated temperature compression device is a brace that applies pressure to an appendage. The electronically regulated temperature compression device applies heat therapy and cooling therapy to the appendage. The temperature of the selected therapy is electronically regulated and controlled. The electronically regulated temperature compression device uses a refrigerant-based heat exchange mechanism during the therapy process. The electronically regulated temperature compression device comprises a composite textile, plurality of fasteners, and a controller. The plurality of fasteners attaches the composite textile to the appendage of the patient. The plurality of fasteners controls the pressure applied by the composite textile to the appendage. The composite textile is a temperature controlled textile used to generate a heat exchange between the electronically regulated temperature compression device and the appendage. The controller manages the temperature and flow of the refrigerant during the therapy process.

Electronically regulated temperature compression brace

A method of monitoring, by one or more cores of a multi-core processor, speculative instructions, where the speculative instructions store data to a shared memory location, and where a semaphore, associated with the memory location, specifies the availability of the memory location to store data. One or more speculative instructions are flushed based on when the semaphore specifies the memory location is unavailable. Any further speculative instructions are suppressed from being issued based on a count of flushed speculation instructions above a specified threshold, executing the speculative instructions when the semaphore specifies the memory location is available, and storing the data to the memory location.

Suppression of speculative accesses to shared memory locations at a processor

In a processing system comprising a cache, a method includes monitoring demand cache accesses for a thread to maintain a first running count of a number of times demand cache accesses for the thread are directed to cachelines that are adjacent in a first direction to cachelines that are targets of a set of sampled cache accesses for the thread. In response to determining the first running count has exceeded a first threshold, the method further includes enabling a first prefetching mode in which a received demand cache access for the thread triggers a prefetch request for a cacheline adjacent in the first direction to a cacheline targeted by the received demand cache access.

Up/down prefetcher

In response to a processor receiving data associated with a shared memory location, a contention blocking buffer stores a memory address of the shared memory location. In response to a probe seeking to take ownership of the shared memory location, the contention blocking buffer determines if the memory address indicated by the probe is stored at the contention blocking buffer. If so, the contention blocking buffer blocks the probe, thereby preventing another processor from taking ownership of the shared memory location.

Contention blocking buffer

A novel putting practice golf cup provides greater development of muscle memory the more aimpoint, clubhead squaring and pacing are practiced resulting in higher confidence and better putting performance during actual play. The putting practice golf cup of the presently preferred and exemplary embodiment of the present invention includes a monolithic body having a first target portion shaped as a golf cup and a second foot portion integrally formed with the first target portion to allow manual placement of the monolithic body upon any indoor or outdoor surface so that the first target portion shaped as a golf cup may be used as an aboveground putting practice target cup.

Putting practice golf cup

A ski pole anti-theft device for providing economical and convenient anti-theft protection to the ski enthusiast is described. Two S shaped members with ski pole encompassing cut-outs pivotally snap fit together to secure a pair of ski poles. The ski pole anti-theft device is small enough to fit comfortably in a skier's jacket pocket. Used together with a padlock or cable/padlock or cable combination lock, the ski pole anti-theft device provides a convenient anti-theft system for both ski poles and skis wherever and whenever required.

Ski pole anti-theft device

A vent plug for insertion into a battery vent well that retains the original large diameter of the well. The vent plug has a body having a top and a bottom and an opening extending from the top to the bottom. A neck extends from the body for insertion into the well. The neck has an opening therein and an arm positioned to engage the underside of a projection in the well without substantially intruding into the well diameter.

Growing community of inventors

Fort Collins, CO, United States of America

William Evan Jones, Iii