Motorola Corporation

Freescale Semiconductor,inc.

William Eric Main

Jeffrey C Durec

Danielle L Coffing

Klaas Wortel

Michael McGinn

David K Lovelace

Michael L Gomez

Jesus S Pena-Finol

Nicholas H Weiner

An integrated demodulator tuning circuit () receives differential currents at input terminals () and provides an AFC signal at an output terminal (). The AFC current characteristic has a dead band () in the output current generated when the integrated demodulator tuning circuit () operates under the condition where the difference between the currents supplied at the input terminals (and) is at or below a set threshold value. The set threshold value is determined by the relative sizes of the transistors (andand) that form the current mirrors connected to the input terminals ().

Circuit and method for processing an automatic frequency control signal

A demodulator circuit ( ) having harmonic cancelling receives an input signal (IF) and generates an oscillator signal (OSC) in an oscillator circuit ( ). The oscillator signal (OSC) is locked to the same frequency and phase as the input signal (IF). A phase shift circuit ( ) generates a shifted signal (OSC SHIFTED) that is in quadrature with the oscillator signal (OSC). A multiplier ( ) receives the oscillator signal (OSC) and the shifted signal (OSC SHIFTED) and generates an output signal ( IF) having twice the frequency of the oscillator signal (OSC). A multiplier circuit ( ) also receives the input signal (IF) and along with the oscillator signal (OSC) generates an output signal (PD). The signals generated by the multiplier ( ) and the multiplier circuit ( ) are summed in a summing circuit ( ) that supplies an output signal (OUT).

Demodulator and method for second harmonic cancellation

A temperature compensation circuit converts a control signal (I ) that has an undesirable temperature coefficient to a temperature compensated control signal (I ) having a desirable temperature coefficient. In one embodiment, four transistors ( , and ) are configured to convert the control signal (I ) having an undesirable temperature coefficient to the temperature compensated control signal (I ) having the desired temperature coefficient. Additional embodiments use components to refine the temperature compensation process.

Temperature compensation circuit and method of compensating

A demodulator circuit ( ) includes an oscillator ( ) and an injection circuit ( ). An Automatic Frequency Control (AFC) signal adjusts the tail current of a current source ( ) provided in the oscillator ( ) and the tail current of a current source ( ) provided in the injection circuit ( ). A phase detector ( ) compares the phase of the signal generated by the oscillator ( ) with the phase of the injected input signal. The phase detector ( ) generates an output signal V having a value of zero when the input signal is in quadrature with the signal generated by the oscillator ( ), but generates a non-zero signal that is used to adjust the AFC signal when the input signal and the signal generated by the oscillator ( ) are not in quadrature.

Demodulator circuit and method of tuning

A circuit for doubling the frequency of an input signal. The circuit includes a full-wave rectifier that rectifies the input signal to generate an output signal with double the frequency of the input signal. The output signal is compared to a predetermined voltage. Based on this comparison, a control signal is fed back to the full-wave rectifier and the output of the rectifier is adjusted to a predetermined level. In this manner the frequency of the input signal is doubled, and the output power is maintained constant, independent of the input power level.

Circuit and method for altering the frequency of a signal

An improved logarithmic amplifier (,) and method in which a signal at an output (,) is logarithmic with respect to the voltage supplied at a gain control input (,). The logarithmic amplifier (,) includes a first amplifier stage (,) and a second amplifier stage (,) which are coupled together by a current mirror stage (,). Alternative embodiments of logarithmic amplifier (,) and (,) include different biasing methods for biasing the second amplifier stage (,).

Logarithmic gain control circuit and method

A transconductance amplifier (,) includes a multiple-stage amplifier (,) for amplifying an Intermediate Frequency (IF) signal. The transconductance amplifier includes a feedback path (,) having a resistance (,) for providing a feedback signal from an output of the multiple-stage amplifier (,) to an input of the multiple-stage amplifier (,). The resistance (,) of the feedback path (,) is selected so that an input impedance of the transconductance amplifier is equal to a source impedance at an input terminal (,) of the transconductance amplifier (,) and an output impedance of the transconductance amplifier (,) is equal to a load impedance at an output terminal (,) of the transconductance amplifier (,).

Amplifier circuit and method for reducing noise therein

An integrated receiver circuit (10) has a first amplifier (12) coupled for receiving a radio frequency (RFIN) input signal. A mixer (16) has an RF input coupled to an output of the first amplifier, a local oscillator (LO) input coupled for receiving an LO signal, and an output for providing an intermediate frequency (IF) signal. A second amplifier (20) has an input coupled for receiving the IF signal, and an output for providing a receive signal strength indicator (RSSI) signal representative of an input power level of the receiver signal path. A feedback circuit (22-26 or 72, 78) is coupled between the first output of the second amplifier and a linearity control input of the mixer for controlling linearity of the mixer.

Circuit and method of controlling mixer linearity

A current regulator (60, 90, and 100) provides current regulation. The current regulator (60, 90, and 100) has a bias generator (14) which compares a generated voltage, V.sub.ref, with a feedback voltage generated in accordance with an output current provided in a reference circuit (57, 58, and 59). The current regulator (60, 90, and 100) operates as a bias circuit to minimize the quiescent currents for efficiently providing regulated output currents in current sink circuit (26). The current in the bias generator (14) and the current in the reference circuit (57, 58, and 59) that regulate the output current in current sink circuit (26) are a small percentage of the overall current.

Method and circuit for current regulation

An integrator circuit (10) and a method for generating an output signal that is frequency compensated. The integrated circuit (10) includes an input stage (14) coupled to a transconductance amplifier (11) via a capacitor (13) and a compensation diode (12). The compensation diode (12) provides an impedance that negates an output impedance of the transconductance amplifier (11). The output signal of the integrator circuit (10) is determined by the capacitor (13).

Integrated circuit and method for generating a transimpedance function

A linear differential gain stage (31) has a first input (32), a second input (33), a first output (34), and a second output (35). A differential input voltage is coupled to an input differential transistor pair (39,40). Voltage compensation circuits (53,54) cancel non-linearities due to the input differential transistor pair (39,40). Parasitic capacitance of the input differential transistor pair (39,40) couple current to the first and second inputs (32,33) due to voltage transitions at the first and second outputs (34,35). The current to the first and second inputs (32,33) is canceled by impedance compensation circuits (55,56) that provide an equal magnitude but opposite sign current. The result is an almost infinite input impedance to the linear differential gain stage (31).

Linear differential gain stage

A current mirror circuit (31) that includes an active loop which operates transistors of different conductivity type at equal base-emitter junction voltages to minimize error. A first resistor (38) couples to a base of a first transistor (32) of a first conductivity type in a voltage follower configuration. A reference current is coupled to the first resistor (38). The voltage across the first resistor (38) and base-emitter junction of the first transistor (32) is mirrored across the base-emitter junction of a second transistor (34) of a second conductivity type and a second resistor (39). A third transistor (35) of the second conductivity type in a diode configuration is coupled to receive current from the second transistor (34). The voltage across the third transistor (35) biases a fourth transistor (33) of a first conductivity type. The current from the fourth transistor (33) is provided to the first transistor such that the first and second transistors (32,34) operate at equal base-emitter voltages.

Current mirror circuit

A demodulator circuit (100) and method for producing a demodulated signal V.sub.OUT from an input signal V.sub.IN. A frequency detection circuit (101) produces a quadrature signal V.sub.QUAD which is compared to the input signal V.sub.IN to produce a detected output signal. The phase and frequency of the quadrature signal V.sub.QUAD are responsive to a control signal I.sub.CONTROL. The demodulator circuit (100) has an output terminal (114) which provides the demodulated signal V.sub.OUT. Nonlinearity in the demodulated output signal V.sub.OUT in relation to a modulating signal is reduced by a linearizing feedback circuit (102). Automatic tuning is provided by a tuning feedback circuit (103). The output signals produced at the respective output terminals (114) and (113) of the linearizing feedback circuit (102) and tuning feedback circuit (103) are summed to produce the control current I.sub.CONTROL.

FM demodulator using injection locked oscillator having tuning feedback

A base current compensation circuit (10) generates a current that tracks a gain of a transistor (11). The compensation circuit (10) includes a current mirror formed by a mirror transistor (12) and an output transistor (14). The mirror transistor (12) is connected to the transistor (11) whose gain is tracked. A current source (16) and a feedback transistor (13) causes the mirror transistor (12) to draw a base current from the transistor (11) so that a collector current of the transistor (11) matches a reference current. The output transistor (14) amplifies the base current of the transistor (11) to generate the tracking current in the collector electrode of the output transistor (14).

Base current compensation circuit

A compensation circuit (26, 27, 28, 29) supplies base currents to a plurality of current sources (22, 25) attached to a regulator (50), thereby reducing the load on the regulator and improving overall circuit performance. The compensation circuit measures a single base current, multiplies it by the number of current sources to be supplied, and then provides the multiplied current to a base bus (40) coupled to the bases of the plurality of current sources. The compensation circuit has a very high output impedance with essentially no variation with supply voltage.

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Mesa, AZ, United States of America

William Eric Main