Static Control Components, Inc.

Verisiti, Inc.

Other

Secure Silicon Layer, Inc.

Apex Semiconductors (USA) Company Limited

William Eli Thacker, Iii

Lynton Russell Burchette

Scott Martin Babish

Anthony D Causey

Matthew Justin Morton

Lawrence Dale Lewis

Robert Francis Tenczar

Michael Clinton Hoke

Scott M Babish

An electronic device includes: a base layer; a first layer located at least partially over the base layer; a second layer located at least partially over the first layer; a first metal layer located at least partially over the second layer, wherein one or more signal outputs of the electronic device are formed in the first metal layer; and a second metal layer located at least partially over the first metal layer, wherein one or more gate connection is formed in the second metal layer, wherein removing a portion of the second metal layer disrupts at least one gate connection and deactivates the device.

Semiconductor device having features to prevent reverse engineering

It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices.

A ROM circuit includes a first N channel transistor having an output and having device geometry and device characteristics adapted to bias the output at a predetermined level when a P channel circuit is connected to the first N channel transistor; a pass transistor connected between the output and a data bus, the pass transistor connected to a word line, the word line adapted to turn ON the pass transistor when the word line is asserted; and the P channel circuit connected to the data bus and adapted to provide leakage current to charge a gate in the first N channel transistor when pass transistor is turned ON.

Electronic systems, such as printing systems, often use components that have integral memory. The integral memory can be used to store information about the component. In some printing systems this memory includes a portion that stores a value indicative of a print yield. Disclosed is a method and system for allowing the memory to have data indicative of an increased print yield.

Network printer system

A method of operating a cartridge chip installed in an imaging device includes: causing, by the cartridge chip, the imaging device to enter an error condition; monitoring the timing or sequence of communication signals received from the imaging device during at least a portion of the error condition; and operating, based on the timing or sequence of the communication signals received from the imaging device during at least a portion of the error condition, in a first mode of operation compatible with a first type of imaging device or in a second mode of operation compatible with a second type of imaging device.

Systems and methods for universal imaging components

Disclosed is a system and method for verifying a chip having a memory. Remanufacturers of imaging devices, such as inkjet printers or electrostatic printers, often have to use a replacement chip in order to reuse an imaging cartridge. It is desirable to have a system and method for determining if the replacement chip is suitable for use with a specific imaging cartridge. Also, it may be desirable to confirm that the chip was manufactured by a specific manufacturer. The disclosed system and method allow the remanufacturer a reliable and efficient way to verify chips.

Growing community of inventors

Sanford, NC, United States of America

William Eli Thacker, Iii